| Energy priority scheduling for variable voltage processors |
| Full text |
Pdf
(227 KB)
|
| Source
|
International Symposium on Low Power Electronics and Design
archive
Proceedings of the 2001 international symposium on Low power electronics and design
table of contents
Huntington Beach, California, United States
Pages: 28 - 33
Year of Publication: 2001
ISBN:1-58113-371-5
|
|
Authors
|
|
Johan Pouwelse
|
Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands
|
|
Koen Langendoen
|
Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands
|
|
Henk Sips
|
Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands
|
|
| Sponsor |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 0, Downloads (12 Months): 6, Citation Count: 27
|
|
|
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
J.-D. Bakker, J. Mouw, and M. Joosen. Linux Advanced Radio Terminal. http://www.lart.tudelft.nl/
|
| |
2
|
D. Grunwald, P. Levis, K. Farkas, C. Morrey, and M. Neufeld. Policies for dynamic clock scheduling. In OSDI, San Diego, CA, October 2000.
|
 |
3
|
Inki Hong , Darko Kirovski , Gang Qu , Miodrag Potkonjak , Mani B. Srivastava, Power optimization of variable voltage core-based systems, Proceedings of the 35th annual conference on Design automation, p.176-181, June 15-19, 1998, San Francisco, California, United States
[doi> 10.1145/277044.277088]
|
 |
4
|
|
| |
5
|
|
| |
6
|
|
| |
7
|
A. Manzak and C. Chakrabarti. Variable voltage task scheduling for minimizing energy or minimizing power. In IEEE Int. Conf. on Acoustic, Speech, and Signal Processing (ICASSP'00), pages 3239 -3242, June 2000.
|
 |
8
|
Trevor Pering , Tom Burd , Robert Brodersen, The simulation and evaluation of dynamic voltage scaling algorithms, Proceedings of the 1998 international symposium on Low power electronics and design, p.76-81, August 10-12, 1998, Monterey, California, United States
[doi> 10.1145/280756.280790]
|
 |
9
|
|
| |
10
|
J. Pouwelse, K. Langendoen, R. Lagendijk, and H. Sips. Power-aware video decoding. In 22nd Picture Coding Symposium, Seoul, Korea, Apr. 2001.
|
 |
11
|
|
| |
12
|
|
| |
13
|
M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced CPU energy. InOSDI, pages 13-23, 1994.
|
| |
14
|
|
CITED BY 27
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Yung-Chia Lin , Yi-Ping You , Chung-Wen Huang , Jenq Kuen Lee , Wei-Kuan Shih , Ting-Ting Hwang, Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains, The Journal of Supercomputing, v.42 n.2, p.201-223, November 2007
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Vincent W. Freeh , David K. Lowenthal , Feng Pan , Nandini Kappiah , Rob Springer , Barry L. Rountree , Mark E. Femal, Analyzing the Energy-Time Trade-Off in High-Performance Computing Applications, IEEE Transactions on Parallel and Distributed Systems, v.18 n.6, p.835-848, June 2007
|
|
|
|
|
|
|
|