vEC

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

vEC: virtual energy counters

Full text

Pdf (153 KB)

Source

Workshop on Program Analysis for Software Tools and Engineering archive
Proceedings of the 2001 ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering table of contents

Snowbird, Utah, United States

Pages: 28 - 31

Year of Publication: 2001

ISBN:1-58113-413-4

Authors

I. Kadayif	Microsystems Design Lab, Pennsylvania State University, University Park, PA
T. Chinoda	Microsystems Design Lab, Pennsylvania State University, University Park, PA
M. Kandemir	Microsystems Design Lab, Pennsylvania State University, University Park, PA
N. Vijaykirsnan	Microsystems Design Lab, Pennsylvania State University, University Park, PA
M. J. Irwin	Microsystems Design Lab, Pennsylvania State University, University Park, PA
A. Sivasubramaniam	Microsystems Design Lab, Pennsylvania State University, University Park, PA

Sponsors

SIGSOFT: ACM Special Interest Group on Software Engineering
SIGPLAN: ACM Special Interest Group on Programming Languages

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 44, Citation Count: 6

Additional Information:

abstract references cited by index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/379605.379639 What is a DOI?

ABSTRACT

Energy has become a critical issue in processor design, especially in embedded environments. Thus, there is a need for tools, which provide an accurate and fast estimation of energy. In this paper, we present the design and use of a tool, Virtual Energy Counters (vEC), for estimating the energy consumption of user programs. vEC is built on top of the Perfmon user library for the UltraSPARC platform, and provides a user interface, which can be used within user programs to estimate the energy consumption. The energy estimates are provided for those consumed in the data, instruction and extended caches, main memory, address bus, data bus, address pads, and data pads.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	H. S. Kim , V. Narayanan , M. Kandemir , M. J. Irwin, Multiple Access Caches: Energy Implications, Proceedings of the IEEE Computer Society Annual Workshop on VLSI (WVLSI'00), p.53, April 27-28, 2000
	2	W. Ye , N. Vijaykrishnan , M. Kandemir , M. J. Irwin, The design and use of simplepower: a cycle-accurate energy estimation tool, Proceedings of the 37th conference on Design automation, p.340-345, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337436]
	3	David A. Padua , Michael J. Wolfe, Advanced compiler optimizations for supercomputers, Communications of the ACM, v.29 n.12, p.1184-1201, Dec. 1986 [doi>10.1145/7902.7904]
	4	Michael E. Wolf, D. Maydan, E. Chen, Ding-Kai. Combining loop transformations considering caches and scheduling. IEEE 1999, pp. 274-284.
	5	Perfmon users guide. http://www.cse.msu.edu/~enbody/perfmon/
	6	The UltraSPARC processor - Technology white paper: The UltraSPARC architecture. www.sun.com/microelectron ics/whitepapers/UltraSPARCtechnology
	7	Performance tuning optimization for Origin2000 and Onyx2. http://techpubs.sgi.com/library/manuals/3000/007-3511- 001/ html/
	8	M. Kandemir , N. Vijaykrishnan , M. J. Irwin , W. Ye, Influence of compiler optimizations on system power, Proceedings of the 37th conference on Design automation, p.304-307, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337425]
	9	Anantha P. Chandrakasan , Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publishers, Norwell, MA, 1995

CITED BY 6

	Gilberto Contreras , Margaret Martonosi, Power prediction for intel XScale® processors using performance monitoring unit events, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
	Selim Gurun , Chandra Krintz, A run-time, feedback-based energy estimation model For embedded devices, Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, October 22-25, 2006, Seoul, Korea
	Kapil Vaswani , Matthew J. Thazhuthaveetil , Y. N. Srikant, A Programmable Hardware Path Profiler, Proceedings of the international symposium on Code generation and optimization, p.217-228, March 20-23, 2005
	Canturk Isci , Margaret Martonosi, Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.93, December 03-05, 2003
	Nevine AbouGhazaleh , Bruce R. Childers , Daniel Mossé , Rami G. Melhem, Near-Memory Caching for Improved Energy Consumption, IEEE Transactions on Computers, v.56 n.11, p.1441-1455, November 2007
	Youngjin Cho , Younghyun Kim , Sangyoung Park , Naehyuck Chang, System-level power estimation using an on-chip bus performance monitoring unit, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California