ACM Home Page
Please provide us with feedback. Feedback
Speculative precomputation: long-range prefetching of delinquent loads
Full text PdfPdf (996 KB)
Source International Symposium on Computer Architecture archive
Proceedings of the 28th annual international symposium on Computer architecture table of contents
Göteborg, Sweden
Pages: 14 - 25  
Year of Publication: 2001
ISBN:0-7695-1162-7
Also published in ...
Authors
Jamison D. Collins  Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA
Hong Wang  Microprocessor Research Lab, Intel Corporation, Santa Clara, CA
Dean M. Tullsen  Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA
Christopher Hughes  Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL
Yong-Fong Lee  Microcomputer Software Lab, Intel Corporation, Santa Clara, CA
Dan Lavery  Microcomputer Software Lab, Intel Corporation, Santa Clara, CA
John P. Shen  Microprocessor Research Lab, Intel Corporation, Santa Clara, CA
Sponsors
SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE-CS\TCCA : TC on Computer Arhitecture
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 19,   Downloads (12 Months): 79,   Citation Count: 65
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/379240.379248
What is a DOI?

ABSTRACT

This paper explores Speculative Precomputation, a technique that uses idle thread context in a multithreaded architecture to improve performance of single-threaded applications. It attacks program stalls from data cache misses by pre-computing future memory accesses in available thread contexts, and prefetching these data. This technique is evaluated by simulating the performance of a research processor based on the Itanium™ ISA supporting Simultaneous Multithreading. Two primary forms of Speculative Precomputation are evaluated. If only the non-speculative thread spawns speculative threads, performance gains of up to 30% are achieved when assuming ideal hardware. However, this speedup drops considerably with more realistic hardware assumptions. Permitting speculative threads to directly spawn additional speculative threads reduces the overhead associated with spawning threads and enables significantly more aggressive speculation, overcoming this limitation. Even with realistic costs for spawning threads, speedups as high as 169% are achieved, with an average speedup of 76%.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
S.G. Abraham and B. R. Rau. Predicting load latencies using cache profiling. In Hewlett Packard Lab, Technical Report HPL-94-110, Dec. 1994.
 
2
 
3
4
 
5
J. Emer. Simultaneous multithreading: Multiplying Alpha's performance. In Microprocessor Forum, Oct. 1999.
 
6
 
7
 
8
Intel Corporation. Intel IA-64 architecture software developer's manual.
9
10
 
11
12
 
13
 
14
 
15
Y. Song and M. Dubois. Assisted execution. In Tcchnicai Report CENG 98-25, Department of EE-Systems, UniversiO' of Southern Californm, Oct. 1998.
 
16
SPEC. SPEC cpu2000 documentation. In http://www.spec.org/osg/cpu2OOO/docs/.
17
 
18
D. Tullsen. Simulation and modeling of a simultaneous multitbreaded processor. In 22nd Annual Computer Measurement Group Conference, Dec. 1996.
19
20
 
21
R. Uhlig, R. Fishtein, O. Gershon, 1. Hirsh, and H. Wang. SoftSDV: A presilicon software development environment for the IA-64 architecture. In lntel Technology Journal, 4th Quarter 1999.
22
 
23
H. Wang et al. A conjugate flow processor. In Docket No. 884.225US1. Patent Pending, May 2000.
24
25

CITED BY  65

Collaborative Colleagues:
Jamison D. Collins: colleagues
Hong Wang: colleagues
Dean M. Tullsen: colleagues
Christopher Hughes: colleagues
Yong-Fong Lee: colleagues
Dan Lavery: colleagues
John P. Shen: colleagues