| Two economical directory schemes for large-scale cache coherent multiprocessors |
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ACM SIGARCH Computer Architecture News
archive
Volume 19 , Issue 5 (September 1991)
table of contents
Page: 10
Year of Publication: 1991
ISSN:0163-5964
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Authors
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Yeong-Chang Maa
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Dept. of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA
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Dhiraj K. Pradhan
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Dept. of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA
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Dominique Thiebaut
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Dept. of Computer Science, Smith College, Northampton, MA
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Downloads (6 Weeks): 8, Downloads (12 Months): 29, Citation Count: 7
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ABSTRACT
Cache coherence problem is a major issue in the design of shared-memory multiprocessors. As the number of processors grows, traditional bus-based snoopy schemes for cache coherence are no longer adequate. Instead, the directory-based scheme is a promising alternative for the large-scale cache coherence problem. However, the storage overhead of (full-map) directory scheme may become too prohibitive as the system size goes up. This paper presents two distributed directory schemes, the tree directory and the hierarchical full-map directory, to deal with the storage overhead problem. Preliminary trace-driven evaluations show that the performance of our schemes compares favorably to the full-map directory scheme, while reducing the storage overhead by over 90%. These two schemes should lend themselves to the design and implementation of large-scale cache coherent multiprocessors.
CITED BY 7
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S. Mori , H. Saito , M. Goshima , S. Tomita , M. Yanagihara , T. Tanaka , D. Fraser , K. Joe , H. Nitta, A distributed shared memory multiprocessor ASURA: memory and cache architecture, Proceedings of the 1993 ACM/IEEE conference on Supercomputing, p.740-749, December 1993, Portland, Oregon, United States
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