| Fast printed circuit board routing |
| Full text |
Pdf
(930 KB)
|
| Source
|
Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 24th ACM/IEEE Design Automation Conference
table of contents
Miami Beach, Florida, United States
Pages: 727 - 734
Year of Publication: 1987
ISBN:0-8186-0781-5
|
|
Author
|
|
J. Dion
|
Digital Equipment Corporation Western Research Laboratory, 100 Hamilton Avenue, Palo Alto, CA
|
|
| Sponsor |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 0, Downloads (12 Months): 12, Citation Count: 1
|
|
|
ABSTRACT
This paper describes the algorithms in a printed circuit board router used for fully automatic routing of high-density circuit boards. Completely automatic routing and running times of a few minutes have resulted from a new data structure for efficient representation of the routing grid, quick searches for optimal solutions, and generalizations of Lee's algorithm.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
Soukup J., "Circuit Layout", Proc. IEEE, Vol. 69No. 10October 1981, pp. 1281-1304.
|
 |
2
|
|
| |
3
|
|
| |
4
|
Moore E.F., "The Shortest Path Through a Maze", Proc. Int. Syrup. on Switching Theory, 1959, pp. 285-292, Harvard University Press
|
| |
5
|
Lee C. Y., "An Algorithm for Path Connection and its Applications", IRE Transactions on Electronic Computers,September 1961, pp. 346-365.
|
 |
6
|
|
| |
7
|
Mikami K., Tabushi K., "A Computer Program for Optimal Routing of Printed Circuit Connectors", IFIPS, 1970, pp. 1475-1478.
|
 |
8
|
W. Heyns , W. Sansen , H. Beke, A line-expansion algorithm for the general routing problem with a guaranteed solution, Proceedings of the 17th conference on Design automation, p.243-249, June 23-25, 1980, Minneapolis, Minnesota, United States
[doi> 10.1145/800139.804534]
|
| |
9
|
Rubin F., "The Lee Connection Algorithm", IEEE Transactions on Computers, Vol. C-23 1974, pp. 907-914.
|
| |
10
|
|
| |
11
|
|
| |
12
|
|
CITED BY
|
|
Gi-Joon Nam , Karem A. Sakallah , Rob A. Rutenbar, Satisfiability-based layout revisited: detailed routing of complex FPGAs via search-based Boolean SAT, Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays, p.167-175, February 21-23, 1999, Monterey, California, United States
|
|