Mesh arrays and LOGICIAN: a tool for their efficient generation

ABSTRACT

This paper introduces a standard structure for VLSI design which we call the mesh array and describes a design tool called LOGICIAN which minimizes a set of functions for realization in CMOS mesh arrays. LOGICIAN features multi-level logic synthesis through recursive enumeration of each function. Several techniques to speed-up the minimization process in LOGICIAN are described.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN

General Terms:
Design