| Functional verification of MOS circuits |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 24th ACM/IEEE Design Automation Conference
table of contents
Miami Beach, Florida, United States
Pages: 265 - 270
Year of Publication: 1987
ISBN:0-8186-0781-5
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Author
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D. Weise
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Stanford University, Computer Systems Laboratory, Center for Integrated Systems 207, Stanford, California
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Downloads (6 Weeks): 0, Downloads (12 Months): 11, Citation Count: 4
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ABSTRACT
This report describes the ideas behind Silica Pithecus, a program which verifies synchronous digital MOS VLSI circuits. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the inputs signals (e.g., which inputs are mutually exclusive), and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification Silica Pithecus returns to the designer the precise reason it fails to do so. Unlike previous verification systems, Silica Pithecus employs a realistic electrical model. It also automatically generates the constraints on the inputs of a circuit which ensure the circuit will exhibit its intended digital behavior. These constraints are necessary for hierarchical verification. Silica Pithecus operates hierarchically, interactively, and incrementally.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Barrow
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Barrow, Harry. "Proving the Correctness of Digital Hardware Designs" VLSI Design, July 1984
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Bryant85
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Randal Bryant, "Symbolic Verification of MOS Circuits" Proceedings from the 1985 Chapel Hill Conference on VLSI. Edited by Hem'y Fuchs. Computer Science Press. 1985
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Bryant86
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Ra~dal Bryant, "Can a Simulator Verify a CircuiL?" In Formal Aspects of VZSI Design, G.J. Milne, Ed!Ltor, North-Holland, 1986
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Eveking
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Hans Eveking, "The verification of mutilevel hardware descriptions," Unpublished proceedings of the Darmstadt Workshop on the Verification of Hardware Designs.
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Gordon
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Gordon, Mike. "A Very Simple Model of SequentialL Behavior of nMOS," Proceedings VLSI International Conference, J Gray (ed.) Academic Press, London and New York 1981
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Gordon84
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"How to Specify and Verify Hardware Us'rag Higher Order Logic" Unpublished Lecture Notes, Autumn 1984. Cambridge University, UK. 1984
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Wagner
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Weise
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Daniel Weise, Formal Multilevel Hierarchical Verific4~tion of Synchrouou~ MOS VL5I Circuita, Phi) Thesis, MIT, Department of Electrical Engineering and Computer Sc~.ence, 1986.
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