Circuit simulation on the connection machine

ABSTRACT

Accurate circuit simulation is a very important step in the design of high performance integrated circuits. The ever increasing size of integrated circuits requires the use of an inordinate amount of computer time to be spent in circuit simulation. Parallel processors have been considered to speed up the simulation process. Massively parallel computers have been made available recently and present a new interesting paradigm for expensive CAD applications. This paper describes algorithms and programming techniques needed to develop SUM (Simulation Using Massively parallel computers), a relaxation-based circuit simulator on the Connection Machine, a massively parallel processor with up to 65536 processors. SUM can simulate circuits at almost constant CPU time per iteration, regardless of circuit size. SUM can simulate very large circuits. Circuit simulators running on the largest super computers can run circuits of comparable size, however SUM is easily scalable as the number of processors in the Connection Machine increases, with almost no increase in CPU time.

REFERENCES

• Chen84: C.F.Chen, P. Subramanyam, '~rhc Second Generation MOTIS Timing Simulator - An Efficient and Accurate Approach for GencrM MOS Circuits", Proc, 1984 Int, Syrup. on Circ, and Syst., Montreal, Canada, May 1984.
• Deso69: C .A. Deso~ a.ud E.S. Kuh, Badc Circuit Theory# McGraw-Hi{11969.
• Deut85: Jeffrey T. Deutsch, Algorithms and architecture for multiprocessor-based circuit simulation, 1985
• Hill85: W. Daniel HLllis, The Connection Machine, M1T Press, Cambridge, Massachusetts, 1985.
• Klec84: J. Kleckner, "Advanced Mixed-Mode Simulation Techniques", Ph.D. Thesis, University of California, Berkeley~ 1984.
• Moka85: M.E. Mokaxi-Bolhassan, D. Smart, T.N. Trick, "A New Robust Relaxation Tedanique for VLSI Circuit Simulation", Prec. ICCAD, 1985.
• Newt83: A.R. Newton, A.L. Sanglovanni-Vincentelli, "Rdaxation - Based Circuit Simulation", IEEE Trans. on EL), VoL ED-30, N. 9, pp1184- 1207, Sept. 1983.
• Orte70: James M. Ortega , Werner C. Rheinboldt, Iterative solution of nonlinear equations in several variables, Society for Industrial and Applied Mathematics, Philadelphia, PA, 2000
• Pan85: V Pan , J Reif, Efficient parallel solution of linear systems, Proceedings of the seventeenth annual ACM symposium on Theory of computing, p.143-152, May 06-08, 1985, Providence, Rhode Island, United States [doi>10.1145/22145.22161]
• Varg62: R.S. Varga, Matriz Rerative Analysis, Prentice.Hall, 1962.
• Whit86: Jacob K. White , Alberto Sangiovanni-Vincentelli, Relaxation techniques for the simulation of VLSI circuits, Kluwer Academic Publishers, Norwell, MA, 1987

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation

Additional Classification:
  C. Computer Systems Organization

General Terms:
Algorithms, Design