| Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 38th annual Design Automation Conference
table of contents
Las Vegas, Nevada, United States
Pages: 559 - 562
Year of Publication: 2001
ISBN:1-58113-297-2
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Downloads (6 Weeks): 16, Downloads (12 Months): 59, Citation Count: 33
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ABSTRACT
In this paper, we propose preconditioned Krylov-subspace iterative methods to perform efficient DC and transient simulations for large-scale linear circuits with an emphasis on power delivery circuits. We also prove that a circuit with inductors can be simplified from MNA to NA format, and the matrix becomes an s.p.d matrix. This property makes it suitable for the conjugate gradient with incomplete Cholesky decomposition as the preconditioner, which is faster than other direct and iterative methods. Extensive experimental results on large-scale industrial power grid circuits show that our method is over 200 times faster for DC analysis and around 10 times faster for transient simulation compared to SPICE3. Furthermore, our algorithm reduces over 75% of memory usage than SPICE3 while the accuracy is not compromised.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 33
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Jin Shi , Yici Cai , Sheldon X.-D. Tan , Xianlong Hong, High accurate pattern based precondition method for extremely large power/ground grid analysis, Proceedings of the 2006 international symposium on Physical design, April 09-12, 2006, San Jose, California, USA
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Yici Cai , Zhu Pan , Shelton X-D Tan , Xianlong Hong , Wenting Hou , Lifeng Wu, Relaxed hierarchical power/ground grid analysis, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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Jingjing Fu , Zuying Luo , Xianlong Hong , Yici Cai , Sheldon X.-D. Tan , Zhu Pan, A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.505-510, January 27-30, 2004, Yokohama, Japan
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Zhengyong Zhu , Khosro Rouz , Manjit Borah , Chung-Kuan Cheng , Ernest S. Kuh, Efficient transient simulation for transistor-level analysis, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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Tsung-Hao Chen , Clement Luk , Hyungsuk Kim , Charlie Chung-Ping Chen, INDUCTWISE: inductance-wise interconnect simulator and extractor, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.215-220, November 10-14, 2002, San Jose, California
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Yahong Cao , Yu-Min Lee , Tsung-Hao Chen , Charlie Chung-Ping Chen, HiPRIME:: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
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Yi Zou , Qiang Zhou , Yici Cai , Xianlong Hong , Sheldon X.-D. Tan, Analysis of buffered hybrid structured clock networks, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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Yuichi Tanji , Takayuki Watanabe , Hidemasa Kubota , Hideki Asai, Large scale RLC circuit analysis using RLCG-MNA formulation, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Quming Zhou , Kai Sun , Kartik Mohanram , Danny C. Sorensen, Large power grid analysis using domain decomposition, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Meeta S. Gupta , Jarod L. Oatley , Russ Joseph , Gu-Yeon Wei , David M. Brooks, Understanding voltage variations in chip multiprocessors using a distributed power-delivery network, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
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Yici Cai , Jin Shi , Zhu Pan , Xianlong Hong , Sheldon X. -D. Tan, Large scale P/G grid transient simulation using hierarchical relaxed approach, Integration, the VLSI Journal, v.41 n.1, p.153-160, January, 2008
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