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Fast power/ground network optimization based on equivalent circuit modeling
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 38th annual Design Automation Conference table of contents
Las Vegas, Nevada, United States
Pages: 550 - 554  
Year of Publication: 2001
ISBN:1-58113-297-2
Authors
X.-D. Sheldon Tan  Altera Corporation, 101 Innovation Dr., San Jose, CA
C.-J. Richard Shi  Department of Electrical Engineering, University of Washington, Seattle, WA
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 7,   Downloads (12 Months): 22,   Citation Count: 14
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ABSTRACT

This paper presents an efficient algorithm for optimizing the area of power or ground networks in integrated circuits subject to the reliability constraints. Instead of solving the original power/ground networks extracted from circuit layouts as previous methods did, the new method first builds the equivalent models for many series resistors in the original networks, then the sequence of linear programming method [9] is used to solve the simplified networks. The solutions of the original networks then are back solved from the optimized, simplified networks. The new algorithm simply exploits the regularities in the power/ground networks. Experimental results show that the complexities of simplified networks are typically significantly smaller than that of the original circuits, which renders the new algorithm extremely fast. For instance, power/ground networks with more than one million branches can be sized in a few minutes on modern SUN workstations.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
J. R. Black, "Electromigration failure modes in aluminum metalization for semiconductor devices," in Proc. of IEEE, vol. 57, pp.1587-1597, Sept. 1996.
 
2
S. Chowdhury and M. A. Breuer, "Minimal area design of power/ground nets having graph topologies," IEEE Trans. Circuits and Systems, vol. CAS-34, no. 12, pp. 1441-1451, Dec. 1987.
 
3
S. Chowdhury and M. A. Breuer, "Optimum design of IC power/ground networks subject to reliability constraints," IEEE Trans. Computer-Aided Design, vol. 7, no. 7, pp. 787-796, July 1988.
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6
R. E. Griffith and R. A. Stewart, "A nonlinear programming technique for the optimization of continuous process systems," Management Science, no. 7, pp. 379-392, 1961.
 
7
D. Stark and M. Horowitz, "Techniques for Calculating Currents and Voltages in VLSI Power Supply Networks," IEEE Trans. on Computer-Aided Design, vol. 9, no. 2, pp. 126-132, February 1990.
 
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9

CITED BY  14

Collaborative Colleagues:
X.-D. Sheldon Tan: colleagues
C.-J. Richard Shi: colleagues