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A new gate delay model for simultaneous switching and its applications
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 38th annual Design Automation Conference table of contents
Las Vegas, Nevada, United States
Pages: 289 - 294  
Year of Publication: 2001
ISBN:1-58113-297-2
Authors
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 30,   Citation Count: 14
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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19
A. Chatzigeorgiou, S. Nikolaidis, and I. Tsoukalas, "A modeling technique for CMOS gates", IEEE Trans. on CAD, vol. 18, pp. 557-575, May 1999.
 
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M. Abramovici, M. Breuer, and A. Friedman, Digital Systems Testing and Testable Design, IEEE Press, 1995.

CITED BY  14

Collaborative Colleagues:
Liang-Chi Chen: colleagues
Sandeep K. Gupta: colleagues
Melvin A. Breuer: colleagues