| Simultaneous shield insertion and net ordering under explicit RLC noise constraint |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 38th annual Design Automation Conference
table of contents
Las Vegas, Nevada, United States
Pages: 199 - 202
Year of Publication: 2001
ISBN:1-58113-297-2
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Authors
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Kevin M. Lepak
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Electrical and Computer Engineering Department, University of Wisconsin, Madison, WI
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Irwan Luwandi
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Electrical and Computer Engineering Department, University of Wisconsin, Madison, WI
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Lei He
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Electrical and Computer Engineering Department, University of Wisconsin, Madison, WI
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Downloads (6 Weeks): 0, Downloads (12 Months): 9, Citation Count: 9
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ABSTRACT
For multiple coupled RLC nets, we formulate the min-area simultaneous shield insertion and net ordering SINO/NB-&ngr; problem to satisfy the given noise bound. We develop an efficient and conservative model to compute the peak noise, and apply the noise model to a simulated-annealing (SA) based algorithm for the SINO/NB-&ngr; problem. Extensive and accurate experiments show that the SA-based algorithm is efficient, and always achieves solutions satisfying the given noise bound. It uses up to 71\% and 30\% fewer shields when compared to a greedy based shield insertion algorithm and a separated shield insertion and net ordering algorithm, respectively. To the best of our knowledge, it is the first work that presents an in-depth study on the min-area SINO problem under an explicit noise constraint.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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K. M. Lepak, I. Luwandi, and L. He, "Simultaneous shield insertion and net ordering under explicit noise constraint," Tech. Rep. ECE-00-006, University of Wisconsin, 2000.
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L. He, N. Chang, S. Lin, and O. S. Nakagawa, "An efficient inductance modeling for on-chip interconnects," in IEEE CICC, pp. 457-460, 1999.
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Jason Cong , Lei He , Andrew B. Kahng , David Noice , Nagesh Shirali , Steve H.-C. Yen, Analysis and justification of a simple, practical 2 1/2-D capacitance extraction methodology, Proceedings of the 34th annual conference on Design automation, p.627-632, June 09-13, 1997, Anaheim, California, United States
[doi> 10.1145/266021.266303]
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CITED BY 9
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Harmander S. Deogun , Rajeev R. Rao , Dennis Sylvester , David Blaauw, Leakage-and crosstalk-aware bus encoding for total power reduction, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
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