| Behavioral partitioning in the synthesis of mixed analog-digital systems |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 38th annual Design Automation Conference
table of contents
Las Vegas, Nevada, United States
Pages: 133 - 138
Year of Publication: 2001
ISBN:1-58113-297-2
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Authors
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Sree Ganesan
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Department of ECECS, ML 0030, University of Cincinnati, Cincinnati, OH
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Ranga Vemuri
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Department of ECECS, ML 0030, University of Cincinnati, Cincinnati, OH
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Downloads (6 Weeks): 4, Downloads (12 Months): 11, Citation Count: 3
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ABSTRACT
Synthesis of mixed-signal designs from behavioral specifications must address analog-digital partitioning. In this paper, we investigate the issues in mixed-signal behavioral partitioning and design space exploration for signal-processing systems. We begin with the system behavior specified in an intermediate format called the Mixed Signal Flow Graph, based on the time-amplitude characterization of signals. We present techniques for analog-digital behavioral partitioning of the MSFG, and performance estimation of the technology-mapped analog and digital circuits. The partitioned solution must satisfy constrants on imposed by the target field programmable mixed-signal architecture on avaialable configurable resources, available data converters, their resolution and speed, and IO pins. The quality of the solution is evaluated based on two metrics, namely feasibility and performance. The former is a measure of the validity of the solution with respect to the architectural constraints. The latter measures the performance of the system based on bandwidth/speed and noise.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Alex Doboli , Adrian Nunez-Aldana , Nagu Dhanwada , Sree Ganesan , Ranga Vemuri, Behavioral synthesis of analog systems using two-layered design space exploration, Proceedings of the 36th ACM/IEEE conference on Design automation, p.951-957, June 21-25, 1999, New Orleans, Louisiana, United States
[doi> 10.1145/309847.310105]
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S. Ganesan and R. Vemuri, "An FPGA/FPAA-Based Rapid Prototyping Environmentfor Mixed Signal Systems," in Reconfigurable Technology: FPGAs for Computing and Applications, Proc. of SPIE, vol. 3844, pp. 49-60, 1999.
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A. Doboli and R. Vemuri, "aBlox - A Hierarchical Representation for Behavioral Synthesis of Analog Systems from VHDL-AMS," Tech. Rep. TR-DDEL, University of Cincinnati, April 1998.
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J. Faura et al., "FIPSOC: A Field ProgrammableSystem On a Chip," in DCIS, 1997.
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M. Nagata and A. Iwata, "Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design," in IEICE Trans. Fundamentals, vol. E82-A, pp. 271-277, February 1999.
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CITED BY 3
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Faik Baskaya , Sasank Reddy , Sung Kyu Lim , Tyson Hall , David V. Anderson, Mapping algorithm for large-scale field programmable analog array, Proceedings of the 2005 international symposium on Physical design, April 03-06, 2005, San Francisco, California, USA
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Daniel Mueller , Guido Stehr , Helmut Graeb , Ulf Schlichtmann, Deterministic approaches to analog performance space exploration (PSE), Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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