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ABSTRACT
Interactive 3D graphics applications require significant arithmetic processing to handle complex models, particularly if realistic rendering techniques are used. Current semiconductor technology cannot provide the necessary performance without some form of multi-processing.This paper describes a graphics processor architecture which can be configured with an arbitrary number of identical processors operating in parallel. Each of the parallel processors can be programmed identically as if it were a single processor system, substantially simplifying software development and allowing complex rendering functions to take advantage of the multiple processors. The architecture described is able to achieve extremely high performance while allowing the price/performance of the system to be optimized for a given application.Techniques are described for handling graphics command distribution, sequencing of commands which must be processed in order, parallel processing of graphics primitive picking, and handling inquiry (read-back) commands.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Fuchs, H. and Poulton, J., "Pixel-Planes: A VLS1-Oriented Design for a Raster Graphics Engine," VLSI Design, No. 3 (1981), 20.
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van Dam. A., et. al., "PHIGS+ Functional Description Rev. 2," Jointly developed PHIGS+ specification. (1987) Contact Andries van Dam - Committee Chairman, Stellar Computer Inc., 100 Wells Ave., Newton, MA, 02159. (1987).
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CITED BY 17
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Greg Humphreys , Ian Buck , Matthew Eldridge , Pat Hanrahan, Distributed rendering for scalable displays, Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM), p.30-es, November 04-10, 2000, Dallas, Texas, United States
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Henry Fuchs , John Poulton , John Eyles , Trey Greer , Jack Goldfeather , David Ellsworth , Steve Molnar , Greg Turk , Brice Tebbs , Laura Israel, Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories, ACM SIGGRAPH Computer Graphics, v.23 n.3, p.79-88, July 1989
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Tom Diede , Carl F. Hagenmaier , Glen S. Miranker , Jonathan J. Rubinstein , William S. Worley, Jr., The Titan Graphics Supercomputer Architecture, Computer, v.21 n.9, p.13-28, 30, September 1988
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