A generic wrapper architecture for multi-processor SoC cosimulation and design

ABSTRACT

In communication refinement with multiple communication protocols and abstraction levels, the system specification is described by heterogeneous components in terms of communication protocols and abstraction levels. To adapt each heterogeneous component to the other part of system, we present a generic wrapper architecture that can adapt different protocols or different abstraction levels, or both. In this paper, we give a detailed explanation of applying the generic wrapper architecture to mixed-level cosimulation. As preliminary experiments, we applied it to mixed-level cosimulation of an IS-95 CDMA cellular phone system.

REFERENCES

• 1: Kanishka Lahiri , Anand Raghunathan , Ganesh Lakshminarayana , Sujit Dey, Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips, Proceedings of the 37th conference on Design automation, p.513-518, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337561]
• 2: Kanishka Lahiri , Anand Raghunathan , Sujit Dey, Efficient exploration of the SoC communication architecture design space, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
• 3: Milenko Drinic , Darko Kirovski , Seapahn Meguerdichian , Miodrag Potkonjak, Latency-guided on-chip bus network design, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
• 4: Steven Vercauteren , Bill Lin , Hugo De Man, Constructing application-specific heterogeneous embedded architectures from custom HW/SW applications, Proceedings of the 33rd annual conference on Design automation, p.521-526, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240617]
• 5: James A. Rowson , Alberto Sangiovanni-Vincentelli, Interface-based design, Proceedings of the 34th annual conference on Design automation, p.178-183, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266060]
• 6: Christopher K. Lennard , Patrick Schaumont , Gjalt de Jong , Anssi Haverinen , Pete Hardee, Standards for system-level design: practical reality or solution in search of a question?, Proceedings of the conference on Design, automation and test in Europe, p.576-585, March 27-30, 2000, Paris, France [doi>10.1145/343647.343859]
• 7: D.D. Gajski, J. Zinz, R. Dmer, A. , and S. Zao, Specification Language and Methodolosy, Kluwor Academic Publishers, 2000.
• 8: Syneps, Inc., "SystemC, Vendon 2.0", available at http:I/www.systemc.org/.
• 9: Coware, Inc., "N2C", available at http/www.rare.mm/mwmeN2C.hanL
• 10: Kurt Keutzer, Hardware/software co-simulation, Proceedings of the 31st annual conference on Design automation, p.439-440, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196458]
• 11: Luc Séméria , Abhijit Ghosh, Methodology for hardware/software co-verification in C/C++ (short paper), Proceedings of the 2000 conference on Asia South Pacific design automation, p.405-408, January 2000, Yokohama, Japan [doi>10.1145/368434.368712]
• 12: J.-Y. Brunel , W. M. Kruijtzer , H. J. H. N. Kenter , F. Pétrot , L. Pasquier , E. A. de Kock , W. J. M. Smits, COSY communication IP's, Proceedings of the 37th conference on Design automation, p.406-409, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337515]
• 13: Patrice Gerin , Sungjoo Yoo , Gabriela Nicolescu , Ahmed A. Jerraya, Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures, Proceedings of the 2001 conference on Asia South Pacific design automation, p.63-68, January 2001, Yokohama, Japan [doi>10.1145/370155.370276]
• 14: G. Nicolescu , S. Yoo , A. Jerraya, Mixed-level cosimulation for fine gradual refinement of communication in SoC design, Proceedings of the conference on Design, automation and test in Europe, p.754-759, March 2001, Munich, Germany
• 15: Roman L. Lysecky , Frank Vahid , Tony D. Givargis, Techniques for reducing read latency of core bus wrappers, Proceedings of the conference on Design, automation and test in Europe, p.84-91, March 27-30, 2000, Paris, France [doi>10.1145/343647.343710]
• 16: Stoics, Inc., "Silicon Backplane uNetwork", available at http://www.smicainc,pages/Networks.html.
• 17: Damien Lyonnard , Sungjoo Yoo , Amer Baghdadi , Ahmed A. Jerraya, Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip, Proceedings of the 38th conference on Design automation, p.518-523, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.379015]
• 18: K. Hines , G. Borriello, Optimizing communication in embedded system co-simulation, Proceedings of the 5th International Workshop on Hardware/Software Co-Design, p.121, March 24-26, 1997
• 19: Ken Hines , Gaetano Borriello, Dynamic communication models in embedded system co-simulation, Proceedings of the 34th annual conference on Design automation, p.395-400, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266178]
• 20: Ken Hines , Gaetano Borriello, A geographically distributed framework for embedded system design and validation, Proceedings of the 35th annual conference on Design automation, p.140-145, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277075]
• 21: W.O.Cesario,L. Gauthier, D.Lyonnard G. Nicolescu, andA. A. Jerraya, "An based Meta-mudel for the Design of Multiprocessor Embedded Systems", VHDL international User's Forum (VIUF) Fall Workshop, Oct. 2000.
• 22: TIA/EIA-95A, "Mobile Station-Base Stafim Compatibility Standard for Dual- Mode Wideband Spread Spectrum Cellular Systems", 1995.
• 23: S. Yoo, J. Lee J. Jung, K. Rha, Y. Cho, and K. Choi, "Fast Prototyping of an IS-95 CDMA Cellular Phone: a Case Study", Pmc. the 6th Conference of Asia Pacific Chip Design Languases, pp. 61-66, Oct, 1999.
• 24: ARMLtd., "ARM7 Data Sheet", available at http://www.arm.com Documeutation/UserMans/PDFIARMT.p.
• 25: A. Baghdadi , D. Lyonnard , N. Zergainoh , A. Jerraya, An efficient architecture model for systematic design of application-specific multiprocessor SoC, Proceedings of the conference on Design, automation and test in Europe, p.55-63, March 2001, Munich, Germany
• 26: Ferenc Belina , Dieter Hogrefe , Amardeo Sarma, SDL with applications from protocol specification, Prentice-Hall, Inc., Upper Saddle River, NJ, 1991

INDEX TERMS

Primary Classification:
  D. Software
  D.4 OPERATING SYSTEMS

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

General Terms:
Design, Management