| Modeling and evaluation of hardware/software designs |
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International Conference on Hardware Software Codesign
archive
Proceedings of the ninth international symposium on Hardware/software codesign
table of contents
Copenhagen, Denmark
Pages: 11 - 16
Year of Publication: 2001
ISBN:1-58113-364-2
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Authors
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Neal K. Tibrewala
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Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
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JoAnn M. Paul
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Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
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Donald E. Thomas
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Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
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Downloads (6 Weeks): 5, Downloads (12 Months): 18, Citation Count: 3
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ABSTRACT
We introduce the foundation of a system modeling environment targeted at capturing the anticipated interactions of hardware and software behaviors — not just their co-execution. Key to our approach is the separation of external and internal design testbenches. We use a frequency interleaved scheduling foundation ideally suited to our approach because it allows unrestricted hardware and software modeling, a mix of untimed and timed software, and a layered approach using software schedulers and protocols to resolve software to resource time budgets. We illustrate our approach by discussing how architectural corner cases that arise due to interacting hardware and software behaviors can be a meaningful digital modeling concept. In addition to characterizing the response of a system when viewed as a black box, we characterize the response of the design to anticipated design changes. We include examples and simulation results.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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JoAnn M. Paul , Simon N. Peffers , Donald E. Thomas, A codesign virtual machine for hierarchical, balanced hardware/software system modeling, Proceedings of the 37th conference on Design automation, p.390-395, June 05-09, 2000, Los Angeles, California, United States
[doi> 10.1145/337292.337506]
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C.L. Seitz. "System Timing:' Introduction to VLSI Systems. C. Mead, L. Conway. Reading, MA: Addison-Wesley, 1980.
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D. Gajski, E Vabid, S. Narayan, J. Gong. "SpecSyn: An Environment Supporting the Specify-Explore-Refine Paradigm for Hardware/Software System Design" IEEE Trans. VLM, '98.
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Jean-Marc Daveau , Gilberto Marchioro , Ahmed Amine Jerraya, Hardware/software co-design of an ATM network interface card: a case study, Proceedings of the 6th international workshop on Hardware/software codesign, p.111-115, March 15-18, 1998, Seattle, Washington, United States
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Felice Balarin , Massimiliano Chiodo , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Claudio Passerone , Alberto Sangiovanni-Vincentelli , Ellen Sentovich , Kei Suzuki , Bassam Tabbara, Hardware-software co-design of embedded systems: the POLIS approach, Kluwer Academic Publishers, Norwell, MA, 1997
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J. Davis H, M. Goel, C. Hylands, B. Kienhuls, E. Lee, et. al, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, Berkeley. July 1999.
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CITED BY 3
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Andrew S. Cassidy , JoAnn M. Paul , Donald E. Thomas, Layered, Multi-Threaded, High-Level Performance Design, Proceedings of the conference on Design, Automation and Test in Europe, p.10954, March 03-07, 2003
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