| VLSI block placement using less flexibility first principles |
| Full text |
Pdf
(206 KB)
|
| Source
|
Asia and South Pacific Design Automation Conference
archive
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
table of contents
Yokohama, Japan
Pages: 601 - 604
Year of Publication: 2001
ISBN:0-7803-6634-4
|
|
Authors
|
|
Sheqin Dong
|
Department of Computer Science and Technology, Tsinghua University, Beijing, P.R. China, 100084
|
|
Xianlong Hong
|
Department of Computer Science and Technology, Tsinghua University, Beijing, P.R. China, 100084
|
|
Youliang Wu
|
Department os Computer Science and Engineering, The Chinese University of Hong Kong
|
|
Yizhou Lin
|
Department of Computer Science and Technology, Tsinghua University, Beijing, P.R. China, 100084
|
|
Jun Gu
|
Department of Computer Science, Science & Technology University of Hong Kong
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 5, Downloads (12 Months): 9, Citation Count: 2
|
|
|
ABSTRACT
A deterministic algorithm for VLSI block placement was developed in this paper through human's accumulated experience in solving "packing" problem. Rectangle packing problem is just a simplified case of the polygon-shape stone plate packing problem that the ancient masons needed to face. Several "packing" principles derived from the so-called "less flexibility first" experience of the masons. A k-d tree data structure is used for manipulating the packed rectangles under the derived packing principles. Experiment results demonstrate that the algorithm is effective and promising in building block layout application.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
|
 |
2
|
Hidetoshi Onodera , Yo Taniguchi , Keikichi Tamaru, Branch-and-bound placement for building block layout, Proceedings of the 28th conference on ACM/IEEE design automation, p.433-439, June 17-22, 1991, San Francisco, California, United States
[doi> 10.1145/127601.127708]
|
| |
3
|
Hiroshi Murata , Kunihiro Fujiyoshi , Shigetoshi Nakatake , Yoji Kajitani, Rectangle-packing-based module placement, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.472-479, November 05-09, 1995, San Jose, California, United States
|
| |
4
|
Shigetoshi Nakatake , Kunihiro Fujiyoshi , Hiroshi Murata , Yoji Kajitani, Module placement on BSG-structure and IC layout applications, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.484-491, November 10-14, 1996, San Jose, California, United States
|
 |
5
|
Jin Xu , Pei-Ning Guo , Chung-Kuan Cheng, Cluster refinement for block placement, Proceedings of the 34th annual conference on Design automation, p.762-765, June 09-13, 1997, Anaheim, California, United States
[doi> 10.1145/266021.266366]
|
 |
6
|
Pei-Ning Guo , Chung-Kuan Cheng , Takeshi Yoshimura, An O-tree representation of non-slicing floorplan and its applications, Proceedings of the 36th ACM/IEEE conference on Design automation, p.268-273, June 21-25, 1999, New Orleans, Louisiana, United States
[doi> 10.1145/309847.309928]
|
| |
7
|
Xianlong Hong , Gang Huang , Yici Cai , Jiangchun Gu , Sheqin Dong , Chung Kuan Cheng , Jun Gu, Corner block list: an effective and efficient topological representation of non-slicing floorplan, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
|
| |
8
|
Yuliang Wu, Wenqi Huang, Siu-chung Lau, C.K. Wang and Gilbert H. Young, An Effective Quasi-Human Based Heuristic for Sloving Rectangle Packing Problem, in press.
|
 |
9
|
|
CITED BY 2
|
|
|
|
|
Ou He , Sheqin Dong , Jinian Bian , Yuchun Ma , Xianlong Hong, An effective buffer planning algorithm for IP based fixed-outline SOC placement, Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI, March 11-13, 2007, Stresa-Lago Maggiore, Italy
|
|