| Improved crosstalk modeling for noise constrained interconnect optimization |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2001 Asia and South Pacific Design Automation Conference
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Yokohama, Japan
Pages: 373 - 378
Year of Publication: 2001
ISBN:0-7803-6634-4
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Authors
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Jason Cong
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Department of Computer Science, University of California, Los Angeles, CA
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David Zhigang Pan
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Department of Computer Science, University of California, Los Angeles, CA
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Prasanna V. Srinivas
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Magma Design Automation, Inc., 2 Results Way, Cupertino, CA
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Downloads (6 Weeks): 5, Downloads (12 Months): 31, Citation Count: 20
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ABSTRACT
This paper presents a much improved, highly accurate yet efficient crosstalk noise model, the 2-pie model, and applies it to noise-constrained interconnect optimizations. Compared with previous crosstalk noise models of similar complexity, our 2-pie model takes into consideration many key parameters, such as coupling locations (near-driver or near-receiver), and the coarse distributed RC characteristics for victim net. Thus, it is very accurate (less than 6% error on average compared with HSPICE simulations). Moreover, our model provides simple closed-form expressions for both peak noise amplitude and noise width, so it is very useful for noise-aware layout optimizations. In particular, we demonstrate its effectiveness in two applications: (i) Optimization rule generation for noise reduction using various interconnect optimization techniques; (ii) Simultaneous wire spacing to multiple nets for noise constrained interconnect minimization.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Semiconductor Industry Association, National Technology Roadmap for Semiconductors, 1997.
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3
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T. Sakurai, "Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs," IEEE Trans. on Electron Devices, vol. 40, pp. 118-124, 1993.
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4
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H. Kawaguchi and T. Sakurai, "delay and noise formulas for capacitively coupled distributed RC lines," in Proc. Asia and South Pacific Design Automation Conf., pp. 35-43, 1998.
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A. Vittal and M. Marek-Sadowska, "Crosstalk reduction for VLSI," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, pp. 290-98, 1997.
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S. Nakagawa, D. M. Sylvester, J. McBride, and S.-Y. Oh, "Onchip cross talk noise model for deep-submicrometer ulsi interconnect," Hewlett-Packard Journal, vol. 49, pp. 39-45, Aug. 1998.
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7
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A. B. Kahng, S. Muddu, and D. Vidhani, "Noise and delay uncertainty studies for coupled rc interconnects," in IEEE International ASIC/SOC Conference, pp. 3-8, 1999.
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A. Vittal, L. Chen, M. Marek-Sadowska, K.-P. Wang, and S. Yang, "Crosstalk in VLSI interconnections," IEEE Trans. on Computer- Aided Design of Integrated Circuits and Systems, vol. 18, no. 2, pp. 1817-24, 1999.
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Charles J. Alpert , Anirudh Devgan , Stephen T. Quay, Buffer insertion for noise and delay optimization, Proceedings of the 35th annual conference on Design automation, p.362-367, June 15-19, 1998, San Francisco, California, United States
[doi> 10.1145/277044.277145]
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Jason Cong , Lei He , Cheng-Kok Koh , Zhigang Pan, Global interconnect sizing and spacing with consideration of coupling capacitance, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.628-633, November 09-13, 1997, San Jose, California, United States
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CITED BY 20
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Murat R Becer , David Blaauw , Ibrahim N. Hajj , Rajendran Panda, Early probabilistic noise estimation for capacitively coupled interconnects, Proceedings of the 2002 international workshop on System-level interconnect prediction, April 06-07, 2002, San Diego, California, USA
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