Performance analysis using the MIPS R10000 performance counters

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Performance analysis using the MIPS R10000 performance counters

Full text

Pdf (200 KB)

Source

Conference on High Performance Networking and Computing archive
Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) table of contents

Pittsburgh, Pennsylvania, United States

Article No. 16

Year of Publication: 1996

ISBN:0-89791-854-1

Authors

Marco Zagha	Silicon Graphics Inc., 2011 N. Shoreline Blvd., Mountain View, CA
Brond Larson	Silicon Graphics Inc., 2011 N. Shoreline Blvd., Mountain View, CA
Steve Turner	Silicon Graphics Inc., 2011 N. Shoreline Blvd., Mountain View, CA
Marty Itzkowitz	Silicon Graphics Inc., 2011 N. Shoreline Blvd., Mountain View, CA

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

IEEE Computer Society Washington, DC, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 48, Citation Count: 54

Additional Information:

abstract references cited by index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/369028.369059 What is a DOI?

ABSTRACT

Tuning supercomputer application performance often requires analyzing the interaction of the application and the underlying architecture. In this paper, we describe support in the MIPS R10000 for non-intrusively monitoring a variety of processor events -- support that is particularly useful for characterizing the dynamic behavior of multi-level memory hierarchies, hardware-based cache coherence, and speculative execution. We first explain how performance data is collected using an integrated set of hardware mechanisms, operating system abstractions, and performance tools. We then describe several examples drawn from scientific applications that illustrate how the counters and profiling tools provide information that helps developers analyze and tune applications.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	E. A. Brewer , C. N. Dellarocas , A. Colbrook , W. E. Weihl, PROTEUS: A HIGH-PERFORMANCE PARALLEL-ARCHITECTURE SIMULATOR, Massachusetts Institute of Technology, Cambridge, MA, 1991
	2	Cray Research Inc. UNICOS Performance Utilities Reference Manual. Cray Research Publication SR-2040. January, 1994.
	3	Digital Equipment Corporation. pfm - The 21064 Performance Counter Pseudo-Device. DEC OSF/1 Manual pages. 1995.
	4	S. J. Eggers and T. E. Jeremiassen. Eliminating False Sharing. International Conference on Parallel Processing, 377-381. August 1991. http://netlib.att.com/netlib/att/cs/home/jeremiassen/papers/icpp-91.html
	5	A. Eustace and A. Srivastava. ATOM: A Flexible Interface for Building High Performance Program Analysis Tools. DEC WRL Technical Note TN-44. July 1994. http://www.research.digital.com/wrl/publications/abstracts/TN-44.html
	6	M. Galles and E. Williams. Performance Optimizations, Implementation, and Verification of the SGI Challenge Multiprocessor. Proceedings of the 27th Annual Hawaii International Conference on System Sciences, 1994. http://www.sgi.com/Technology/challenge_paper.html
	7	Hui Gao , John L. Larson, Workload characterization using the Cray hardware performance monitor, The Journal of Supercomputing, v.9 n.4, p.391-412, 1995 [doi>10.1007/BF01206274]
	8	Jeffrey D. Gee , Mark D. Hill , Dionisios N. Pnevmatikatos , Alan Jay Smith, Cache Performance of the SPEC92 Benchmark Suite, IEEE Micro, v.13 n.4, p.17-27, July 1993 [doi>10.1109/40.229711]
	9	Aaron J. Goldberg , John L. Hennessy, Performance debugging shared memory multiprocessor programs with MTOOL, Proceedings of the 1991 ACM/IEEE conference on Supercomputing, p.481-490, November 18-22, 1991, Albuquerque, New Mexico, United States [doi>10.1145/125826.126075]
	10	Mark Horowitz , Margaret Martonosi , Todd C. Mowry , Michael D. Smith, Informing memory operations: providing memory performance feedback in modern processors, Proceedings of the 23rd annual international symposium on Computer architecture, p.260-270, May 22-24, 1996, Philadelphia, Pennsylvania, United States
	11	D. Hunt, Advanced performance features of the 64-bit PA-8000, Proceedings of the 40th IEEE Computer Society International Conference, p.123, March 05-09, 1995
	12	James R. Larus , Eric Schnarr, EEL: machine-independent executable editing, Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation, p.291-300, June 18-21, 1995, La Jolla, California, United States
	13	Alvin R. Lebeck , David A. Wood, Cache Profiling and the SPEC Benchmarks: A Case Study, Computer, v.27 n.10, p.15-26, October 1994 [doi>10.1109/2.318580]
	14	Jussi Mäki. POWER2 Hardware Performance Monitor Tools. Nov. 1995. http://www.csc.fi/~jmaki/rs2hpm-paper
	15	Margaret Martonosi , Douglas W. Clark , Malena Mesarina, The SHRIMP performance monitor: design and applications, Proceedings of the SIGMETRICS symposium on Parallel and distributed tools, p.61-69, May 22-23, 1996, Philadelphia, Pennsylvania, United States [doi>10.1145/238020.238040]
	16	Terje Mathisen. Pentium Secrets. Byte Magazine, July 1994, 191-192. http://green.kaist.ac.kr/jwhahn/art3.htm
	17	Alan Mink , Robert Carpenter , George Nacht , John Roberts, Multiprocessor Performance-Measurement Instrumentation, Computer, v.23 n.9, p.63-75, September 1990 [doi>10.1109/2.58219]
	18	MIPS Technologies Inc. R10000 Microprocessor Technical Brief. October 1994. http://www.mips.com/r10k/
	19	MIPS Technologies Inc. The R10000 Superscalar Microprocessor. Hotchips 1995. Presentation available at http://www.mips.com/r10k/
	20	MIPS Technologies Inc. R10000 Microprocessor User's Manual-Version 1.1, Section 14.20: Coprocessor 0 Performance Counter Registers. April 1996. http://www.mips.com/r10k/
	21	Silicon Graphics Inc. Power Challenge Technical Report. http://www.sgi.com/Products/software/PDF/pwr-chlg/
	22	Silicon Graphics Inc. Performance Co-Pilot User's and Administrator's Guide. Document Number 007-2614-001. http://www.sgi.com/Technology/TechPubs/
	23	A. Singhal , A. J. Goldberg, Architectural support for performance tuning: a case study on the SPARCcenter 2000, Proceedings of the 21ST annual international symposium on Computer architecture, p.48-59, April 18-21, 1994, Chicago, Illinois, United States
	24	Josep Torrellas , Anoop Gupta , John Hennessy, Characterizing the caching and synchronization performance of a multiprocessor operating system, Proceedings of the fifth international conference on Architectural support for programming languages and operating systems, p.162-174, October 12-15, 1992, Boston, Massachusetts, United States
	25	Jack E. Veenstra , Robert J. Fowler, MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors, Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems, p.201-207, January 31-February 02, 1994
	26	E. H. Welbon, C. C. Chan-Nui, D. J. Shippy, and D. A. Hicks. POWER2 Performance Monitor. PowerPC and POWER2: Technical Aspects of the New IBM RISC System/6000, IBM Corporation, SA23-2737, pp. 55-63. http://www.austin.ibm.com/tech/monitor.html
	27	Elizabeth Williams , C. Thomas Myers , Rebecca Koskela, The characterization of two scientific workloads using the CRAY X-MP performance monitor, Proceedings of the 1990 conference on Supercomputing, p.142-152, October 1990, New York, New York, United States
	28	Emmett Witchel , Mendel Rosenblum, Embra: fast and flexible machine simulation, Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, p.68-79, May 23-26, 1996, Philadelphia, Pennsylvania, United States

CITED BY 54

	Sameer Shende , Allen D. Malony , Janice Cuny , Peter Beckman , Steve Karmesin , Kathleen Lindlan, Portable profiling and tracing for parallel, scientific applications using C++, Proceedings of the SIGMETRICS symposium on Parallel and distributed tools, p.134-145, August 03-04, 1998, Welches, Oregon, United States
	Dongming Jiang , Jaswinder Pal Singh, Improving parallel shear-warp volume rendering on shared address space multiprocessors, ACM SIGPLAN Notices, v.32 n.7, p.252-263, July 1997
	Luc Renambot , Bruno Arnaldi , Thierry Priol , Xavier Pueyo, Towards efficient parallel radiosity for DSM-based parallel computers using virtual interfaces, Proceedings of the IEEE symposium on Parallel rendering, p.79-86, October 20-21, 1997, Phoenix, Arizona, United States
	Dongming Jiang , Jaswinder Pal Singh, A methodology and an evaluation of the SGI Origin2000, ACM SIGMETRICS Performance Evaluation Review, v.26 n.1, p.171-181, June 1998
	G. Edward Suh , Srinivas Devadas , Larry Rudolph, Analytical cache models with applications to cache partitioning, Proceedings of the 15th international conference on Supercomputing, p.1-12, June 2001, Sorrento, Italy
	Luiz DeRose , K. Ekanadham , Jeffrey K. Hollingsworth , Simone Sbaraglia, SIGMA: a simulator infrastructure to guide memory analysis, Proceedings of the 2002 ACM/IEEE conference on Supercomputing, p.1-13, November 16, 2002, Baltimore, Maryland
	Jennifer M. Anderson , Lance M. Berc , Jeffrey Dean , Sanjay Ghemawat , Monika R. Henzinger , Shun-Tak A. Leung , Richard L. Sites , Mark T. Vandevoorde , Carl A. Waldspurger , William E. Weihl, Continuous profiling: where have all the cycles gone?, ACM SIGOPS Operating Systems Review, v.31 n.5, p.1-14, Dec. 1997
	Yong Luo , Olaf M. Lubeck , Harvey Wasserman , Federico Bassetti , Kirk W. Cameron, Development and validation of a hierarchical memory model incorporating CPU- and memory-operation overlap model, Proceedings of the 1st international workshop on Software and performance, p.152-163, October 12-16, 1998, Santa Fe, New Mexico, United States
	Ravi Iyer , Nancy M. Amato , Lawrence Rauchwerger , Laxmi Bhuyan, Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applications, Proceedings of the 13th international conference on Supercomputing, p.339-347, June 20-25, 1999, Rhodes, Greece
	Stefanos Kaxiras , Zhigang Hu , Margaret Martonosi, Cache decay: exploiting generational behavior to reduce cache leakage power, ACM SIGARCH Computer Architecture News, v.29 n.2, p.240-251, May 2001
	Venkata K. Pingali , Sally A. McKee , Wilson C. Hseih , John B. Carter, Computation regrouping: restructuring programs for temporal data cache locality, Proceedings of the 16th international conference on Supercomputing, June 22-26, 2002, New York, New York, USA
	Dong H. Ahn , Jeffrey S. Vetter, Scalable analysis techniques for microprocessor performance counter metrics, Proceedings of the 2002 ACM/IEEE conference on Supercomputing, p.1-16, November 16, 2002, Baltimore, Maryland
	Jennifer M. Anderson , Lance M. Berc , Jeffrey Dean , Sanjay Ghemawat , Monika R. Henzinger , Shun-Tak A. Leung , Richard L. Sites , Mark T. Vandevoorde , Carl A. Waldspurger , William E. Weihl, Continuous profiling: where have all the cycles gone?, ACM Transactions on Computer Systems (TOCS), v.15 n.4, p.357-390, Nov. 1997
	Yan Solihin , Vinh Lam , Josep Torrellas, Scal-Tool: pinpointing and quantifying scalability bottlenecks in DSM multiprocessors, Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM), p.17-es, November 14-19, 1999, Portland, Oregon, United States
	John Mellor-Crummey , Robert J. Fowler , Gabriel Marin , Nathan Tallent, HPCVIEW: A Tool for Top-down Analysis of Node Performance, The Journal of Supercomputing, v.23 n.1, p.81-104, August 2002
	Mark Oskin , Frederic T. Chong , Matthew Farrens, HLS: combining statistical and symbolic simulation to guide microprocessor designs, ACM SIGARCH Computer Architecture News, v.28 n.2, p.71-82, May 2000
	John Mellor-Crummey , Robert Fowler , David Whalley, Tools for application-oriented performance tuning, Proceedings of the 15th international conference on Supercomputing, p.154-165, June 2001, Sorrento, Italy
	Jack Dongarra , Ian Foster , Geoffrey Fox , William Gropp , Ken Kennedy , Linda Torczon , Andy White, References, Sourcebook of parallel computing, Morgan Kaufmann Publishers Inc., San Francisco, CA, 2003
	Harvey J. Wassermann , Olaf M. Lubeck , Yong Luo , Federico Bassetti, Performance evaluation of the SGI Origin2000: a memory-centric characterization of LANL ASCI applications, Proceedings of the 1997 ACM/IEEE conference on Supercomputing (CDROM), p.1-11, November 15-21, 1997, San Jose, CA
	Ann Gordon-Ross , Frank Vahid, Frequent loop detection using efficient non-intrusive on-chip hardware, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
	Venkata K. Pingali , Sally A. McKee , Wilson C. Hsieh , John B. Carter, Restructuring computations for temporal data cache locality, International Journal of Parallel Programming, v.31 n.4, p.305-338, August 2003
	Mahmut Kandemir, Compiler-Directed Collective-I/O, IEEE Transactions on Parallel and Distributed Systems, v.12 n.12, p.1318-1331, December 2001
	Rohit Chandra , Ding-Kai Chen , Robert Cox , Dror E. Maydan , Nenad Nedeljkovic , Jennifer M. Anderson, Data distribution support on distributed shared memory multiprocessors, ACM SIGPLAN Notices, v.32 n.5, p.334-345, May 1997
	Stefan Manegold , Peter Boncz , Martin Kersten, Optimizing Main-Memory Join on Modern Hardware, IEEE Transactions on Knowledge and Data Engineering, v.14 n.4, p.709-730, July 2002
	Bryan R. Buck , Jeffrey K. Hollingsworth, Using hardware performance monitors to isolate memory bottlenecks, Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM), p.40-es, November 04-10, 2000, Dallas, Texas, United States
	B. B. Fraguela , R. Doallo , J. Touriño , E. L. Zapata, A compiler tool to predict memory hierarchy performance of scientific codes, Parallel Computing, v.30 n.2, p.225-248, February 2004
	Zhigang Hu , Stefanos Kaxiras , Margaret Martonosi, Let caches decay: reducing leakage energy via exploitation of cache generational behavior, ACM Transactions on Computer Systems (TOCS), v.20 n.2, p.161-190, May 2002
	Brian A. Fields , Rastislav Bodik , Mark D. Hill , Chris J. Newburn, Interaction cost and shotgun profiling, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.3, p.272-304, September 2004
	Matthias Hauswirth , Peter F. Sweeney , Amer Diwan , Michael Hind, Vertical profiling: understanding the behavior of object-priented applications, ACM SIGPLAN Notices, v.39 n.10, October 2004
	Ken Batcher , Robert Walker, Cluster miss prediction with prefetch on miss for embedded CPU instruction caches, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
	Mahmut Kendemir , J. Ramanujam, Data Relation Vectors: A New Abstraction for Data Optimizations, IEEE Transactions on Computers, v.50 n.8, p.798-810, August 2001
	Jeffrey K. Hollingsworth, Critical Path Profiling of Message Passing and Shared-Memory Programs, IEEE Transactions on Parallel and Distributed Systems, v.9 n.10, p.1029-1040, October 1998
	Basilio B. Fraguela , Ramón Doallo , Emilio L. Zapata, Probabilistic Miss Equations: Evaluating Memory Hierarchy Performance, IEEE Transactions on Computers, v.52 n.3, p.321-336, March 2003
	Roman Lysecky , Susan Cotterell , Frank Vahid, A fast on-chip profiler memory, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Sriram Sellappa , Siddhartha Chatterjee, Cache-Efficient Multigrid Algorithms, International Journal of High Performance Computing Applications, v.18 n.1, p.115-133, February 2004
	Jia-Jhe Li , Yuan-Shin Hwang, Snug set-associative caches: reducing leakage power while improving performance, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
	Ann Gordon-Ross , Frank Vahid, Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware, IEEE Transactions on Computers, v.54 n.10, p.1203-1215, October 2005
	Ravi Iyer , Jack Perdue , Lawrence Rauchwerger , Nancy M. Amato , Laxmi Bhuyan, An experimental evaluation of the HP V-class and SGI origin 2000 multiprocessors using microbenchmarks and scientific applications, International Journal of Parallel Programming, v.33 n.4, p.307-350, August 2005
	C. Cascaval , E. Duesterwald , P. F. Sweeney , R. W. Wisniewski, Performance and environment monitoring for continuous program optimization, IBM Journal of Research and Development, v.50 n.2/3, p.239-248, March 2006
	Mahmut Kandemir , Prithviraj Banerjee , Alok Choudhary , J. Ramanujam , Eduard Ayguadé, Static and Dynamic Locality Optimizations Using Integer Linear Programming, IEEE Transactions on Parallel and Distributed Systems, v.12 n.9, p.922-941, September 2001
	D. Andrade , B. B. Fraguela , R. Doallo, Analytical modeling of codes with arbitrary data-dependent conditional structures, Journal of Systems Architecture: the EUROMICRO Journal, v.52 n.7, p.394-410, July 2006
	Roman Lysecky , Greg Stitt , Frank Vahid, Warp Processors, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.11 n.3, p.659-681, July 2006
	Stijn Eyerman , Lieven Eeckhout , Tejas Karkhanis , James E. Smith, A performance counter architecture for computing accurate CPI components, ACM SIGOPS Operating Systems Review, v.40 n.5, December 2006
	Narayanan Ganapathy , Curt Schimmel, General purpose operating system support for multiple page sizes, Proceedings of the Annual Technical Conference on USENIX Annual Technical Conference, 1998, p.8-8, June 15-19, 1998, New Orleans, Louisiana
	Peter F. Sweeney , Matthias Hauswirth , Brendon Cahoon , Perry Cheng , Amer Diwan , David Grove , Michael Hind, Using hardware performance monitors to understand the behavior of java applications, Proceedings of the 3rd conference on Virtual Machine Research And Technology Symposium, p.5-5, May 06-07, 2004, San Jose, California
	Yuan-Shin Hwang , Jia-Jhe Li, Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties, ACM Transactions on Architecture and Code Optimization (TACO), v.4 n.1, p.6-es, March 2007
	Marty Itzkowitz , Brian J. N. Wylie , Christopher Aoki , Nicolai Kosche, Memory Profiling using Hardware Counters, Proceedings of the 2003 ACM/IEEE conference on Supercomputing, p.17, November 15-21, 2003
	M. Kandemir , W. Zhang , M. Karakoy, Runtime Code Parallelization for On-Chip Multiprocessors, Proceedings of the conference on Design, Automation and Test in Europe, p.10510, March 03-07, 2003
	Bryan R. Buck , Jeffrey K. Hollingsworth, Data Centric Cache Measurement on the Intel ltanium 2 Processor, Proceedings of the 2004 ACM/IEEE conference on Supercomputing, p.58, November 06-12, 2004
	W. E. Cohen , R. K. Gaede , W. D. Garrett, Hardware-Assisted Characterization of NAS Benchmarks, Cluster Computing, v.4 n.3, p.189-196, July 2001
	Brian A. Fields , Rastislav Bodík , Mark D. Hill , Chris J. Newburn, Using Interaction Costs for Microarchitectural Bottleneck Analysis, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.228, December 03-05, 2003
	Yutao Zhong , Wentao Chang, Sampling-based program locality approximation, Proceedings of the 7th international symposium on Memory management, June 07-08, 2008, Tucson, AZ, USA
	Ajay Nair , Roman Lysecky, Non-intrusive dynamic application profiler for detailed loop execution characterization, Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, October 19-24, 2008, Atlanta, GA, USA
	Mustafa M. Tikir , Jeffrey K. Hollingsworth, Hardware monitors for dynamic page migration, Journal of Parallel and Distributed Computing, v.68 n.9, p.1186-1200, September, 2008