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ABSTRACT
Functional yield is a term used to describe the percentage of dies on a wafer that fail due to catastrophic defects. Within the interconnect these defects are usually caused by particle contamination and are divided into bridging defects, which join adjacent wires, and cuts, which result in broken wires. The probability of failure is therefore determined by the geometry of the routing channels and the distribution of defect sizes. Since the wire spacing and width are usually fixed, and the distribution of defects within a mature production facility is well known, the problem reduces to estimating individual wire lengths for cuts, and to estimating the overlapping distance that two wires share in neighboring sections of the routing grid for bridges. Since the probability of failure is determined by the behavior of the wires averaged over the entire interconnect, the application of System Level Interconnect Prediction (SLIP) techniques is particularly appropriate. This paper presents a method for utilizing previously developed techniques for wire length estimation and layer assignment and applies them to the problem of cut and bridge functional yield estimation.
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CITED BY 6
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Payman Zarkesh-Ha , Ken Doniger , William Loh , Peter Wright, Prediction of interconnect pattern density distribution: derivation, validation, and applications, Proceedings of the 2003 international workshop on System-level interconnect prediction, April 05-06, 2003, Monterey, CA, USA
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Payman Zarkesh-Ha , Ken Doniger , William Loh , Peter Bendix, Prediction of interconnect adjacency distribution: derivation, validation, and applications, Proceedings of the 2004 international workshop on System level interconnect prediction, February 14-15, 2004, Paris, France
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INDEX TERMS
Primary Classification:
C.
Computer Systems Organization
C.1
PROCESSOR ARCHITECTURES
C.1.2
Multiple Data Stream Architectures (Multiprocessors)
Subjects:
Interconnection architectures (e.g., common bus, multiport memory, crossbar switch)
Additional Classification:
C.
Computer Systems Organization
J.
Computer Applications
J.1
ADMINISTRATIVE DATA PROCESSING
Subjects:
Manufacturing
J.2
PHYSICAL SCIENCES AND ENGINEERING
Subjects:
Electronics
General Terms:
Design,
Management,
Measurement,
Performance,
Reliability,
Theory
Keywords:
Rent's rule,
critical areas,
design,
interconnect,
reliability,
theory,
yield
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