A benchmark suite for substrate analysis

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A benchmark suite for substrate analysis

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2000 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

Pages: 617 - 622

Year of Publication: 2000

ISBN:0-7803-5974-7

Authors

Edoardo Charbon	Cadence Design Systems, San Jose, CA
Luis Miguel Silveira	Instituto de Engenharia de Sistemas, e Computadores, Lisboa, Portugal
Paolo Miliozzi	Conxant Systems Inc., Newport Beach, CA

Sponsors

IEEE-CAS : Circuits & Systems
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
IEICE : Inst of Electronics, Info & Communication Engineers

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 3, Downloads (12 Months): 5, Citation Count: 0

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references collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	R. Gharpurey, Modeling and Analysis of Substrate Coupling in ICs, PhD thesis, University of California at Berkeley, May 1995.
	2	T. A. Johnson, R. W. Knepper, V. Marcello and W. Wang, "Chip Substrate Resistance Modeling Technique for Integrated Circuit Design", IEEE Trans. on Computer Aided Design, vol. CAD-3, pp. 126-134, 1984.
	3	D. K. Su, M. Loinaz, S. Masui and B. Wooley, "Experimental Results and Modeling Techniques for Substrate Noise in Mixed- Signal Integrated Circuits", IEEE Journal of Solid State Circuits, vol. SC-28, n. 4, pp. 420-430, April 1993.
	4	K. Joardar, "A Simple Approach to Modeling Cross-Talk in Integrated Circuits", IEEE Journal of Solid State Circuits, vol. SC-29, n. 10, pp. 1212-1219, October 1994.
	5	F. J. R. Clement, E. Zysman M. Kayal and M. Declercq, "LAYIN: Toward a Global Solution for Parasitic Coupling Modeling and Visualization", in Proc. IEEE Custom Integrated Circuit Conference, pp. 537-540, May 1994.
	6	B. R. Stanisic, N. K. Verghese, D. J. Allstot, R. A. Rutenbar and L. R. Carley, "Addressing Substrate Coupling in Mixed-Mode ICs: Simulation and Power Distribution Synthesis", IEEE Journal of Solid State Circuits, vol. SC-29, n. 3, pp. 226-237, March 1994.
	7	Nishath K. Verghese , Timothy J. Schmerbeck , David J. Allstot, Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits, Kluwer Academic Publishers, Norwell, MA, 1995
	8	T. Smedes , N. P. van der Meijs , A. J. van Genderen, Boundary element methods for 3D capacitance and substrate resistance calculations in inhomogeneous media in a VLSI layout verification package, Advances in Engineering Software, v.20 n.1, p.19-27, 1994 [doi>10.1016/0965-9978(94)90027-2]
	9	T. Smedes , N. P. van der Meijs , A. J. van Genderen, Extraction of circuit models for substrate cross-talk, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.199-206, November 05-09, 1995, San Jose, California, United States
	10	R. Gharpurey and R. G. Meyer, "Modeling and Analysis of Substrate Coupling in ICs", IEEE Journal of Solid State Circuits, vol. SC-31, n. 3, pp. 344-353, March 1996.
	11	Sharad Kapur , David E. Long, IES3: Efficient Electrostatic and Electromagnetic Simulation, IEEE Computational Science & Engineering, v.5 n.4, p.60-67, October 1998 [doi>10.1109/99.735896]
	12	A. L. Sangiovanni-Vincentelli, "Circuit Simulation", in Computer Design Aids for VLSI Circuits, pp. 19-112, P. Antognetti and D. O. Pederson and H. DeMan Eds., Sijthoff & Noordhoff (The Netherlands), 1980.
	13	Iasson Vassiliou , Henry Chang , Alper Demir , Edoardo Charbon , Paolo Miliozzi , Alberto Sangiovanni-Vincentelli, A video driver system designed using a top-down, constraint-driven methodology, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.463-468, November 10-14, 1996, San Jose, California, United States
	14	A. J. Van Genderen , N. P. van der Meijs , T. Smedes, Fast Computation of Substrate Resistances in Large Circuits, Proceedings of the 1996 European conference on Design and Test, p.560, March 11-14, 1996
	15	Mike Chou , Jacob White, Multilevel integral equation methods for the extraction of substrate coupling parameters in mixed-signal IC's, Proceedings of the 35th annual conference on Design automation, p.20-25, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277049]
	16	J. P. Costa, M. Chou and L. M. Silveira, "Precorrected-DCT Techniques for Modeling and Simulation of Substrate coupling in mixedsignal IC's", in Proc. IEEE International Symposium on Circuits and Systems, volume 6, pp. 358-362, May 1998.
	17	J. R. Phillips , J. White, A precorrected-FFT method for capacitance extraction of complicated 3-D structures, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.268-271, November 06-10, 1994, San Jose, California, United States
	18	C. Hu, VLSI Electronics: Microstructure Science, volume 18, Academic Press, New York, 1981.
	19	Paul R. Gray , Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Inc., New York, NY, 1990

Collaborative Colleagues:

Edoardo Charbon: colleagues

Luis Miguel Silveira: colleagues

Paolo Miliozzi: colleagues

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