Hierarchical computation of 3-D interconnect capacitance using direct boundary element method

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Hierarchical computation of 3-D interconnect capacitance using direct boundary element method

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2000 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

Pages: 447 - 452

Year of Publication: 2000

ISBN:0-7803-5974-7

Authors

Jiangchun Gu	Department of Computer Science and Technology, Tsinghua University, Beijing 100084, P.R. China
Zeyi Wang	Department of Computer Science and Technology, Tsinghua University, Beijing 100084, P.R. China
Xianlong Hong	Department of Computer Science and Technology, Tsinghua University, Beijing 100084, P.R. China

Sponsors

IEEE-CAS : Circuits & Systems
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
IEICE : Inst of Electronics, Info & Communication Engineers

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 8, Citation Count: 1

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references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	6	Weiping Shi , Jianguo Liu , Naveen Kakani , Tiejun Yu, A fast hierarchical algorithm for 3-D capacitance extraction, Proceedings of the 35th annual conference on Design automation, p.212-217, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277101]
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	12	V. Rokhlin, "Rapid solution of integral equation of classical potential theory," J. Comput. Phys., Vol. 60, pp. 187-207, 1985.
	13	L. Greengard and V. Rokhlin, "The rapid evaluation of potential field in three dimensions," in Vortex Methods, Lecture Notes' in Mathematics 1360, C. Anderson and C. Greengard, Eds. New York: Springer-Verlag, 1988.
	14	J. Barnes and P. Hut, "A hierarchical O(NlogN) force-Calculation algorithm," Nature, Vol. 324, pp. 446-449, 1986.

CITED BY

Wenjian Yu , Zeyi Wang, An efficient quasi-multiple medium algorithm fo the capacitance extraction of actual 3-D VLSI interconnects, Proceedings of the 2001 conference on Asia South Pacific design automation, p.366-372, January 2001, Yokohama, Japan

Collaborative Colleagues:

Jiangchun Gu: colleagues

Zeyi Wang: colleagues

Xianlong Hong: colleagues

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