Edge separability based circuit clustering with application to circuit partitioning

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Edge separability based circuit clustering with application to circuit partitioning

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2000 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

Pages: 429 - 434

Year of Publication: 2000

ISBN:0-7803-5974-7

Authors

Jason Cong	UCLA Department ofComputer Science, Los Angeles, CA
Sung Kyu Lim	UCLA Department ofComputer Science, Los Angeles, CA

Sponsors

IEEE-CAS : Circuits & Systems
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
IEICE : Inst of Electronics, Info & Communication Engineers

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 21, Citation Count: 23

Additional Information:

references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	Charles J. Alpert , Andrew B. Kahng, Recent directions in netlist partitioning: a survey, Integration, the VLSI Journal, v.19 n.1-2, p.1-81, Aug. 1995 [doi>10.1016/0167-9260(95)00008-4]
	4	Jason Cong , Yuzheng Ding, On area/depth trade-off in LUT-based FPGA technology mapping, Proceedings of the 30th international conference on Design automation, p.213-218, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.164675]
	5	Jason Cong , Honching Li , Chang Wu, Simultaneous circuit partitioning/clustering with retiming for performance optimization, Proceedings of the 36th ACM/IEEE conference on Design automation, p.460-465, June 21-25, 1999, New Orleans, Louisiana, United States [doi>10.1145/309847.309980]
	6	Jason Cong , Honching Peter Li , Sung Kyu Lim , Toshiyuki Shibuya , Dongmin Xu, Large scale circuit partitioning with loose/stable net removal and signal flow based clustering, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.441-446, November 09-13, 1997, San Jose, California, United States
	7	Jason Cong , Sung Kyu Lim, Multiway partitioning with pairwise movement, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.512-516, November 08-12, 1998, San Jose, California, United States [doi>10.1145/288548.289079]
	8	Jason Cong , Sung Kyu Lim, Performance driven multiway partitioning, Proceedings of the 2000 conference on Asia South Pacific design automation, p.441-446, January 2000, Yokohama, Japan [doi>10.1145/368434.368736]
	9	Jason Cong , M'Lissa Smith, A parallel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design, Proceedings of the 30th international conference on Design automation, p.755-760, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.165119]
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CITED BY 23

	Jason Cong , Michail Romesis , Min Xie, Optimality, scalability and stability study of partitioning and placement algorithms, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
	C. Cheung , Y. Wu , D. Cheng, Further improve circuit partitioning using GBAW logic perturbation techniques, Proceedings of the conference on Design, automation and test in Europe, p.233-239, March 2001, Munich, Germany
	Jason Cong , Sung Kyu Lim , Chang Wu, Performance driven multi-level and multiway partitioning with retiming, Proceedings of the 37th conference on Design automation, p.274-279, June 05-09, 2000, Los Angeles, California, United States
	Jason Cong , Yizhou Lin , Wangning Long, SPFD-based global rewiring, Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays, February 24-26, 2002, Monterey, California, USA
	Jason Cong , Michail Romesis, Performance-driven multi-level clustering with application to hierarchical FPGA mapping, Proceedings of the 38th conference on Design automation, p.389-394, June 2001, Las Vegas, Nevada, United States
	Jason Cong , Sung Kyu Lim, Performance driven multiway partitioning, Proceedings of the 2000 conference on Asia South Pacific design automation, p.441-446, January 2000, Yokohama, Japan
	Tony F. Chan , Jason Cong , Tianming Kong , Joseph R. Shinnerl, Multilevel optimization for large-scale circuit placement, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Amit Singh , Malgorzata Marek-Sadowska, Efficient circuit clustering for area and power reduction in FPGAs, Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays, February 24-26, 2002, Monterey, California, USA
	Bo Hu , Malgorzata Marek-Sadowska, Fine granularity clustering for large scale placement problems, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
	Jason Cong , Joey Y. Lin , Wangning Long, A new enhanced SPFD rewiring algorithm, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.672-678, November 10-14, 2002, San Jose, California
	Yu-Liang Wu , Chak-Chung Cheung , David Ihsin Cheng , Hongbing Fan, Further improve circuit partitioning using GBAW logic perturbation techniques, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.3, p.451-460, June 2003
	Bo Hu , Malgorzata Marek-Sadowska, Wire length prediction based clustering and its application in placement, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Qinghua Liu , Bo Hu , Malgorzata Marek-Sadowska, Wire length prediction in constraint driven placement, Proceedings of the 2003 international workshop on System-level interconnect prediction, April 05-06, 2003, Monterey, CA, USA
	Thomas Kutzschebauch , Leon Stok, Congestion aware layout driven logic synthesis, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Qinghua Liu , Malgorzata Marek-Sadowska, Pre-layout wire length and congestion estimation, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Jason Cong , Joseph R. Shinnerl , Min Xie , Tim Kong , Xin Yuan, Large-scale circuit placement, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.10 n.2, p.389-430, April 2005
	Jason Cong , Sung Kyu Lim, Physical planning with retiming, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Chao-Yang Yeh , Malgorzata Marek-Sadowska, Sequential delay budgeting with interconnect prediction, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.10, p.1028-1037, October 2004
	Navaratnasothie Selvakkumaran , Abhishek Ranjan , Salil Raje , George Karypis, Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Qinghua Liu , Malgorzata Marek-Sadowska, Wire length prediction-based technology mapping and fanout optimization, Proceedings of the 2005 international symposium on Physical design, April 03-06, 2005, San Francisco, California, USA
	Qinghua Liu , Bo Hu , Malgorzata Marek-Sadowska, Individual wire-length prediction with application to timing-driven placement, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.10, p.1004-1014, October 2004
	Chao-Yang Yeh , Malgorzata Marek-Sadowska, Sequential delay budgeting with interconnect prediction, Proceedings of the 2003 international workshop on System-level interconnect prediction, April 05-06, 2003, Monterey, CA, USA
	Jason Cong , Tim Kong , Joseph R. Shinnerl , Min Xie , Xin Yuan, Large-Scale Circuit Placement: Gap and Promise, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.883, November 09-13, 2003

Collaborative Colleagues:

Jason Cong: colleagues

Sung Kyu Lim: colleagues

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