Modeling and minimization of routing congestion

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Modeling and minimization of routing congestion

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2000 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

Pages: 185 - 190

Year of Publication: 2000

ISBN:0-7803-5974-7

Authors

Maogang Wang	ECE Department, Evanston, IL
Majid Sarrafzadeh	Northwestern University

Sponsors

IEEE-CAS : Circuits & Systems
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
IEICE : Inst of Electronics, Info & Communication Engineers

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 8, Downloads (12 Months): 26, Citation Count: 19

Additional Information:

references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Hans Eisenmann , Frank M. Johannes, Generic global placement and floorplanning, Proceedings of the 35th annual conference on Design automation, p.269-274, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277119]
	2	L.R. Ford and D.R. Fulkerson. Flows in Network. Princeton, NJ, 1962.
	3	J. M. Kleinhans, G. Sigl, F. M. Johannes, and K. J. Antreich. "GORDIAN: VLSI Placement by Quadratic Programming and Slicing Optimization". IEEE Transactions on Computer Aided Design, 10(3):365-365, 1991.
	4	Thomas Lengauer, Combinatorial algorithms for integrated circuit layout, John Wiley & Sons, Inc., New York, NY, 1990
	5	S. Mayrhofer and U. Lauther. "Congestion-Driven Placement Using a New Multi-Partitioning Heuristic". In International Conference on Computer-Aided Design, pages 332-335. IEEE/ACM, November 1990.
	6	R. Nair. "A Simple Yet Effective Technique for Global Wiring". IEEE Transactions on Computer Aided Design, CAD-6(2):165-172, March 1987.
	7	Phiroze N. Parakh , Richard B. Brown , Karem A. Sakallah, Congestion driven quadratic placement, Proceedings of the 35th annual conference on Design automation, p.275-278, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277121]
	8	Y. Saab. "A Fast Clustering-based Min-cut Placement Algorithm with Simulated-annealing Performance". VLSI Design: An International Journal of Custom-Chip Design, Simulation, and Testing, 5(1):37-48, 1996.
	9	Majid Sarrafzadeh , Maogang Wang, NRG: global and detailed placement, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.532-537, November 09-13, 1997, San Jose, California, United States
	10	C. Sechen. VLSI Placement and Global Routing Using Simulated Annealing. Kluwer, B. V., Deventer, The Netherlands, 1988.
	11	P. R. Suaris and G. Kedem. "Quadrisection: A New Approach to Standard Cell Layout". In Design Automation Conference, pages 474-477. IEEE/ACM, 1987.
	12	Maogang Wang , Majid Sarrafzadeh, On the behavior of congestion minimization during placement, Proceedings of the 1999 international symposium on Physical design, p.145-150, April 12-14, 1999, Monterey, California, United States [doi>10.1145/299996.300044]

CITED BY 19

	Maogang Wang , Xiaojian Yang , Kenneth Eguro , Majid Sarrafzadeh, Multi-center congestion estimation and minimization during placement, Proceedings of the 2000 international symposium on Physical design, p.147-152, May 2000, San Diego, California, United States
	Ulrich Brenner , André Rohe, An effective congestion driven placement framework, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
	Jinan Lou , Shankar Krishnamoorthy , Henry S. Sheng, Estimating routing congestion using probabilistic analysis, Proceedings of the 2001 international symposium on Physical design, p.112-117, April 01-04, 2001, Sonoma, California, United States
	Mehdi Saeedi , Morteza Saheb Zamani , Ali Jahanian, Prediction and reduction of routing congestion, Proceedings of the 2006 international symposium on Physical design, April 09-12, 2006, San Jose, California, USA
	Zhuoyuan Li , Weimin Wu , Xianlong Hong, Congestion driven incremental placement algorithm for standard cell layout, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Chiu Wing Sham , Evangeline F. Y. Young, Routability driven floorplanner with buffer block planning, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
	Chiu-wing Sham , Evangeline F. Y. Young, Congestion prediction in early stages, Proceedings of the 2005 international workshop on System level interconnect prediction, April 02-03, 2005, San Francisco, California, USA
	Jinjun Xiong , Lei He, Probabilistic congestion model considering shielding for crosstalk reduction, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
	Minsik Cho , David Z. Pan, BoxRouter: a new global router based on box expansion and progressive ILP, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	Yaoguang Wei , Sheqin Dong , Xianlong Hong , Yuchun Ma, An accurate and efficient probabilistic congestion estimation model in x architecture, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA
	Mehdi Saeedi , Morteza Saheb Zamani , Ali Jahanian, Evaluation, prediction and reduction of routing congestion, Microelectronics Journal, v.38 n.8-9, p.942-958, August, 2007
	Peter Spindler , Frank M. Johannes, Fast and accurate routing demand estimation for efficient routability-driven placement, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
	Wenting Hou , Hong Yu , Xianlong Hong , Yici Cai , Weimin Wu , Jun Gu , William H. Kao, A new congestion-driven placement algorithm based on cell inflation, Proceedings of the 2001 conference on Asia South Pacific design automation, p.605-608, January 2001, Yokohama, Japan
	Steve T. W. Lai , Evangeline F. Y. Young , Chris C. N. Chu, A New and Efficient Congestion Evaluation Model in Floorplanning: Wire Density Control with Twin Binary Trees, Proceedings of the conference on Design, Automation and Test in Europe, p.10856, March 03-07, 2003
	Yi-Lin Hsieh , Tsai-Ming Hsieh, A New Effective Congestion Model in Floorplan Design, Proceedings of the conference on Design, automation and test in Europe, p.21204, February 16-20, 2004
	Chiu-Wing Sham , Evangeline F. Y. Young , Hai Zhou, Optimizing wirelength and routability by searching alternative packings in floorplanning, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.13 n.1, p.1-13, January 2008
	Chiu-Wing Sham , Evangeline F. Y. Young , Jingwei Lu, Congestion prediction in early stages of physical design, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.1, p.1-18, January 2009
	Kalliopi Tsota , Cheng-Kok Koh , Venkataramanan Balakrishnan, Guiding global placement with wire density, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
	Steve T. W. Lai , Evangeline F. Y. Young , Chris C. N. Chu, Handling routability in floorplan design with twin binary trees, Integration, the VLSI Journal, v.42 n.4, p.449-456, September, 2009

Collaborative Colleagues:

Maogang Wang: colleagues

Majid Sarrafzadeh: colleagues

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