Optimizing bit-time computer simulation

ABSTRACT

A major component of a bit-time computer simulation program is the Boolean compiler. The compiler accepts the Boolean functions representing the simulated computer's digital circuits, and generates corresponding sets of machine instructions which are subsequently executed on the “host” computer. Techniques are discussed for increasing the sophistication of the Boolean compiler so as to optimize bit-time computer simulation. The techniques are applicable to any general-purpose computer.

REFERENCES

• 1: ADLER, H., JACOBS, H., KATZ, J. RW logic simulation program. AIEE Pacific Gem Meeting, Aug. 1960. Conf. Paper 60-1063.
• 2: LEDLEY, R. S. Digital Computer and Control Engineering. McGraw-Hill, New York, 1960.
• 3: J. E. Kelley, Jr., Techniques for storage allocation algorithms, Communications of the ACM, v.4 n.10, p.449-454, Oct. 1961 [doi>10.1145/366786.366806]
• 4: STOCKWELL, G. N. Computer logic testing by simulation. IRE Trans. Mil. Electr. MIL-6, 3 (1962), 275-282.
• 5: PHISTER, M. Logical Design of Digital Computers. John Wiley and Sons, New York, 1958.
• 6: IBM Reference Manual: 7090 Data Processing System, 1959, 1960.