Binary decision diagram with minimum expected path length

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Binary decision diagram with minimum expected path length

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Munich, Germany

Pages: 708 - 712

Year of Publication: 2001

ISBN:0-7695-0993-2

Authors

Y. Liu	Department of Computer Science, National Tsing Hua University, Hsinchu 300, Taiwan
K. Wang
T. Hwang
C. Liu

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
ECSI :
IEEE-CS\DATC : IEEE Computer Society
RAS : RAS
EDAC : Electronic Design Automation Consortium
IEEE-CS\TTTC : Test Technology Technical Council
IFIP WG 10.5 : IFIP WG 10.5
EDAA : European Design Automation Association

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 25, Citation Count: 2

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	S. B. Akers, "Binary decision diagrams", IEEE Trans. Comput., Vol. C-27, pp. 509-516, June 1978.
	2	Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
	3	Karl S. Brace , Richard L. Rudell , Randal E. Bryant, Efficient implementation of a BDD package, Proceedings of the 27th ACM/IEEE conference on Design automation, p.40-45, June 24-27, 1990, Orlando, Florida, United States [doi>10.1145/123186.123222]
	4	Richard Rudell, Dynamic variable ordering for ordered binary decision diagrams, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.42-47, November 07-11, 1993, Santa Clara, California, United States
	5	Masahiro Fujita , Yusuke Matsunaga , Taeko Kakuda, On variable ordering of binary decision diagrams for the application of multi-level logic synthesis, Proceedings of the conference on European design automation, February 25-28, 1991, Amsterdam, The Netherlands
	6	N. Ishiura, H. Sawada, and S. Yajima, "Minimization of Binary Decision Diagrams Based on Exchanges of Variables" ICCAD, pp. 472-475, Nov. 1991.
	7	K. H. Wang, T. T. Hwang, and C. Chen, "Restructuring Binary Decision Diagrams Based on Functional Equivalence", EDAC, pp 261-265, Feb. 1993.
	8	E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P. R. Stephan, R. K. Brayton, A. Sangiovanni-Vincentelli, "SIS: A System for Sequential Circuit Synthesis", Electronics Research Laboratory Memorandum No. UCB/ERL M92/41, 4 May 1992.

CITED BY 2

	Rüdiger Ebendt , Wolfgang Günther , Rolf Drechsler, Minimization of the expected path length in BDDs based on local changes, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.865-870, January 27-30, 2004, Yokohama, Japan
	Jon T. Butler , Tsutomu Sasao , Munehiro Matsuura, Average Path Length of Binary Decision Diagrams, IEEE Transactions on Computers, v.54 n.9, p.1041-1053, September 2005