Techniques for the simulation of computer logic

ABSTRACT

A special operator calculus developed by Hartley in 1956 together with a new mapping scheme has been found to be efficient in programming analysis of variance for multifactor experiments. The operator calculus and the mapping scheme are described in detail.

REFERENCES

• 1: Jesse H. Katz, Optimizing bit-time computer simulation, Communications of the ACM, v.6 n.11, p.679-685, Nov. 1963 [doi>10.1145/368310.368393]
• 2: --, ADLER, H., AND JACOBS, H. The R-W logic simulation program. AIEE Conf. Paper CP 60-1063, Aug. 8, 1960, 9 pp.
• 3: WOLFE, R. E. Logical simulation techniques using the IBM 709. Presented at Dynamic Digital Logic Conf., sponsored by Computer Control Co.
• 4: STOCKWELL, G. N. Computer logic testing by simulation. IRE Trans., PGME (July 1962), 275-282.
• 5: LARSEN, R. P. Logic simulation program. Paper, AIEE Design Automation Workshop 1962, Michigan State U., May 1962, 6 pp.
• 6: BASHKOW, J. R., FRIETS, J., AND KARSON, A. A programming system for detection and diagnosis of nmchine malfunctions. IEEE Trans., PGEC (Feb. 1963), 10-17.
• 7: CALDWELL, S. H. Switching Circuits and Logical Design. John Wiley, New York, 1958, 211-226.
• 8: LAWLER, E. L. The minimal synthesis of tree structures. In Proc. 4th Ann. Symp. Switching Circuit Theory and Logical Design (S-156), IEEE, Sept. 1963, 63-82.
• 9: LEVIEN, R. E. Determining the best ordering of variables in cascade switching circuits. Proc. 4th Ann. Symp. Switching Circuit Theory and Logical Design (S-156), IEEE, Sept. 1963, 83-104.

INDEX TERMS

Primary Classification:
  F. Theory of Computation
  F.4 MATHEMATICAL LOGIC AND FORMAL LANGUAGES
      F.4.1 Mathematical Logic
          Subjects: Computational logic

Additional Classification:
  G. Mathematics of Computing

  I. Computing Methodologies
  I.6 SIMULATION AND MODELING

General Terms:
Design, Experimentation, Performance, Theory