Interconnection networks for large-scale parallel processing: theory and case studies

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Interconnection networks for large-scale parallel processing: theory and case studies

Source

Lexington Books New York, NY, USA

Pages: 260

Year of Publication: 1985

ISBN:0-669-03594-7

Author

Howard J. Siegel

Purdue Univ., West Lafayette, IN

Publisher

Lexington Books New York, NY, USA

Bibliometrics

Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Citation Count: 53

Additional Information:

cited by index terms review collaborative colleagues

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CITED BY 53

	A. A. Abonamah , F. N. Sibai , N. K. Sharma, Conflict Resolution and Fault-Free Path Selection in Multicast-Connected Cube-Based Networks, IEEE Transactions on Computers, v.43 n.3, p.374-380, March 1994
	D. C. Winsor , T. N. Mudge, Analysis of bus hierarchies for multiprocessors, ACM SIGARCH Computer Architecture News, v.16 n.2, p.100-107, May 1988
	Masahito Hirakawa , Kazuyuki Tsuda , Minoru Tanaka , Tadao Ichikawa, A relational database machine organization for parallel pipelined query execution, Proceedings of 1986 ACM Fall joint computer conference, p.1233-1244, November 1986, Dallas, Texas, United States
	Sandeep N. Bhatt , Fan R. K. Chung , Jia-Wei Hong , F. Thomson Leighton , Bojana Obrenic , Arnold L. Rosenberg , Eric J. Schwabe, Optimal emulations by butterfly-like networks, Journal of the ACM (JACM), v.43 n.2, p.293-330, March 1996
	P. J. Bernhard , D. J. Rosenkrantz, Using the Dual Path Property of Omega Networks to Obtain Conflict-Free Message Routing, IEEE Transactions on Parallel and Distributed Systems, v.2 n.4, p.503-507, October 1991
	Peter G. Harrison, The representation of multistage interconnection networks in queuing models of parallel systems, Journal of the ACM (JACM), v.37 n.4, p.863-898, Oct. 1990
	Brian W. O'Krafka , A. Richard Newton, An empirical evaluation of two memory-efficient directory methods, ACM SIGARCH Computer Architecture News, v.18 n.3a, p.138-147, June 1990
	S. Bandyopadhyay , A. Sengupta, A robust protocol for parallel join operation in distributed data bases, Proceedings of the first international symposium on Databases in parallel and distributed systems, p.97-106, December 05-07, 1988, Austin, Texas, United States
	D. Rau , J. A. B. Fortes , H. J. Siegel, Destination tag routing techniques based on a state model for the LADM network, ACM SIGARCH Computer Architecture News, v.16 n.2, p.318-324, May 1988
	Chang-hoon Choi , Sung-chun Kim, Hierarchical multistage interconnection network for shared-memory multiprocessor system, Proceedings of the 1997 ACM symposium on Applied computing, p.468-472, April 1997, San Jose, California, United States
	Matthew Farrens , Brad Wetmore , Allison Woodruff, Alleviation of tree saturation in multistage interconnection networks, Proceedings of the 1991 ACM/IEEE conference on Supercomputing, p.400-409, November 18-22, 1991, Albuquerque, New Mexico, United States
	D. Lee, Scrambled storage for parallel memory systems, ACM SIGARCH Computer Architecture News, v.16 n.2, p.232-239, May 1988
	P. Stenström, A cache consistency protocol for multiprocessors with multistage networks, ACM SIGARCH Computer Architecture News, v.17 n.3, p.407-415, June 1989
	N. M. Patel , P. G. Harrison, On hot-spot contention in interconnection networks, ACM SIGMETRICS Performance Evaluation Review, v.16 n.1, p.114-123, May 1988
	R. Hoebelheinrich , R. Thomsen, Multiple crossbar network integrated supercomputing framework, Proceedings of the 1989 ACM/IEEE conference on Supercomputing, p.713-720, November 12-17, 1989, Reno, Nevada, United States
	A. El-Amawy , S. Latifi, Properties and Performance of Folded Hypercubes, IEEE Transactions on Parallel and Distributed Systems, v.2 n.1, p.31-42, January 1991
	P. J. Narayanan, Processor autonomy on SIMD architectures, Proceedings of the 7th international conference on Supercomputing, p.127-136, July 19-23, 1993, Tokyo, Japan
	C. M. Fiduccia, Bused Hypercubes and Other Pin-Optimal Networks, IEEE Transactions on Parallel and Distributed Systems, v.3 n.1, p.14-24, January 1992
	Yossi Azar , Joseph (Seffi) Naor , Raphael Rom, Routing Strategies for Fast Networks, IEEE Transactions on Computers, v.45 n.2, p.165-173, February 1996
	Krishnan Padmanabhan, Cube structures for multiprocessors, Communications of the ACM, v.33 n.1, p.43-52, Jan. 1990
	M. Takesue, A Family of Parallel Prefix Algorithms Embedded in Networks, IEEE Transactions on Parallel and Distributed Systems, v.4 n.10, p.1179-1184, October 1993
	Ahmed El-Amawy , Priyalal Kulasinghe, On the Complexity of Optimal Bused Interconnections, IEEE Transactions on Computers, v.44 n.10, p.1248-1251, October 1995
	M. Jeng , H. J. Siegel, A Distributed Management Scheme for Partitionable Parallel Computers, IEEE Transactions on Parallel and Distributed Systems, v.1 n.1, p.120-126, January 1990
	C. M. Fiduccia , K. J. Rappoport, Perfect shifters, IEEE Transactions on Computers, v.43 n.3, p.340-349, March 1994
	Eli Upfal , Sergio Felperin , Marc Snir, Randomized Routing with Shorter Paths, IEEE Transactions on Parallel and Distributed Systems, v.7 n.4, p.356-362, April 1996
	A. S. Youssef , B. Narahari, The Banyan-Hypercube Networks, IEEE Transactions on Parallel and Distributed Systems, v.1 n.2, p.160-169, April 1990
	W. Michael, A scalable coherent cache system with a dynamic pointing scheme, Proceedings of the 1992 ACM/IEEE conference on Supercomputing, p.358-367, November 16-20, 1992, Minneapolis, Minnesota, United States
	C. P. Kruskal , M. Snir , A. Weiss, The Distribution of Waiting Times in Clocked Multistage Interconnection Networks, IEEE Transactions on Computers, v.37 n.11, p.1337-1352, November 1988
	H. Burkhart , R. Millen, Performance-Measurement Tools in a Multiprocessor Environment, IEEE Transactions on Computers, v.38 n.5, p.725-737, May 1989
	Ralph Duncan, A Survey of Parallel Computer Architectures, Computer, v.23 n.2, p.5-16, February 1990
	Israel Gazit , Miroslaw Malek, Fault Tolerance Capabilities in Multistage Network-Based Multicomputer Systems, IEEE Transactions on Computers, v.37 n.7, p.788-798, July 1988
	H. Li , M. Maresca, Polymorphic-Torus Architecture for Computer Vision, IEEE Transactions on Pattern Analysis and Machine Intelligence, v.11 n.3, p.233-243, March 1989
	Antoine Mourad , Banu Özden , Miroslaw Malek, Comprehensive Testing of Multistage Interconnection Networks, IEEE Transactions on Computers, v.40 n.8, p.935-951, August 1991
	W. J. Hsu, Fibonacci Cubes-A New Interconnection Technology, IEEE Transactions on Parallel and Distributed Systems, v.4 n.1, p.3-12, January 1993
	T. A. Rice , L. H. Jamieson, A Highly Parallel Algorithm for Root Extraction, IEEE Transactions on Computers, v.38 n.3, p.443-449, March 1989
	A. Y. Oruç , A. Thirumalai, A Systematic Design of Cellular Permutation Arrays, IEEE Transactions on Computers, v.38 n.10, p.1447-1451, October 1989
	K. Hwang , D. Kim , P.-S. Tseng, An Orthogonal Multiprocessor for Parallel Scientific Computations, IEEE Transactions on Computers, v.38 n.1, p.47-61, January 1989
	F. N. Sibai , N. K. Sharma , A. A. Abonamah, Comparison of Reconfiguration Schemes for the C2SC MIN Operating in the Broadcast Mode, IEEE Transactions on Computers, v.43 n.9, p.1112-1119, September 1994
	Abdullah A. Abonamah , Fadi N. Sibai, A simulation study of the performance of the extra-stage cube and the augmented-shuffle exchange networks under faults, ACM SIGSIM Simulation Digest, v.22 n.1, p.3-16, Summer 1992
	E. C. Bronson , T. L. Casavant , L. H. Jamieson, Experimental Application-Driven Architecture Analysis of an SIMD/MIMD Parallel Processing System, IEEE Transactions on Parallel and Distributed Systems, v.1 n.2, p.195-205, April 1990
	P. J. Bernhard , D. J. Rosenkrantz, Partitioning Message Patterns for Bundled Omega Networks, IEEE Transactions on Parallel and Distributed Systems, v.5 n.4, p.353-363, April 1994
	A. Yavuz Oruç , M. Mittal, Setup Algorithms for Cube-Connected Parallel Computers Using Recursive Karnaugh Maps, IEEE Transactions on Computers, v.40 n.2, p.217-221, February 1991
	I. Gazit , M. Malek, On the Number of Permutations Performable by Extra-Stage Multistage Interconnection Networks, IEEE Transactions on Computers, v.38 n.2, p.297-302, February 1989
	Elizabeth Suet Hing Tse, Switch fabric design for high performance IP routers: a survey, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.10-11, p.571-601, October/November 2005
	G. Lee, A Performance Bound of Multistage Combining Networks, IEEE Transactions on Computers, v.38 n.10, p.1387-1395, October 1989
	C. J. Shih , K. E. Batcher, Adding Multiple-Fault Tolerance to Generalized Cube Networks, IEEE Transactions on Parallel and Distributed Systems, v.5 n.8, p.785-792, August 1994
	M. Jeng , H. J. Siegel, Design and Analysis of Dynamic Redundancy Networks, IEEE Transactions on Computers, v.37 n.9, p.1019-1029, September 1988
	Alastair D. McAulay, An extendable optically interconnected parallel computer, Proceedings of 1986 ACM Fall joint computer conference, p.441-447, November 1986, Dallas, Texas, United States
	Sanjay Rajopadhye , Gautam Gupta , Lakshminarayanan Renganarayana, A domain specific interconnect for reconfigurable computing, ACM SIGPLAN Notices, v.43 n.7, July 2008
	Bradley Warren Smith , Howard Jay Siegel, Models for use in the design of macro-pipelined parallel processors, ACM SIGARCH Computer Architecture News, v.13 n.3, p.116-123, June 1985
	Nathaniel J. Davis, IV , Howard Jay Siegel, The performance analysis of partitioned circuit switched multistage interconnection networks, ACM SIGARCH Computer Architecture News, v.13 n.3, p.387-394, June 1985
	Matthew Moore , Charles McDowell, Bi-directional networks for large parallel processors, ACM SIGARCH Computer Architecture News, v.15 n.3, p.3-4, June 1987
	D.-L. Lee , Y. H. Wang, Conflict-free access of arrays in a parallel processor, Proceedings of the first annual ACM symposium on Parallel algorithms and architectures, p.313-317, June 18-21, 1989, Santa Fe, New Mexico, United States

INDEX TERMS

Classification:
C. Computer Systems Organization
C.1 PROCESSOR ARCHITECTURES
C.1.2 Multiple Data Stream Architectures (Multiprocessors)
Subjects: Parallel processors**; Multiple-instruction-stream, multiple-data-stream processors (MIMD); Interconnection architectures (e.g., common bus, multiport memory, crossbar switch)

General Terms:
Design, Performance, Reliability, Theory, Verification

REVIEW

"Jorgen Staunstrup : Reviewer"

Multiprocessors with many units, such as processors, stores, peripherals, etc., are currently under massive investigation. The goal of this work is primarily to construct computers with several orders of magnitude more processing power than what more...

Collaborative Colleagues:

Howard J. Siegel: colleagues

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