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A language for treating geometric patterns in a two-dimensional space
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Communications of the ACM archive
Volume 14 ,  Issue 1  (January 1971) table of contents
Pages: 26 - 32  
Year of Publication: 1971
ISSN:0001-0782
Authors
G. Bracchi  Politecnico di Milano, Milano, Italy
D. Ferrari  Univ. of California, Berkeley
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 4,   Downloads (12 Months): 12,   Citation Count: 1
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ABSTRACT

In this paper CADEP, a problem-oriented language for positioning geometric patterns in a two-dimensional space, is presented. Although the language has been specifically designed for the automatic generation of integrated circuit masks, it turns out to be well suited also for such other placement problems as architecture design, urban planning, logical and block diagram representation. The design criteria, the structure, and the specific features of CADEP are illustrated.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
FREITAG, n., AND DONATH, W.E. Automatic mask and wiring pattern generation. NASA-ERC Computer Aided Circuit Design Symposium, Apr. 1967.
 
2
SPITALNY, A., AND GOLDBERG, M.J. On-line graphics applied to layout design of integrated circuits. Proc. IEEE 55, 11 (Nov. 1967), 1982-1988.
 
3
COOK, P. W., ET AL. Automatic network generation for large scale integration. IEEE J. Solid-State Circuits SC-2, 4 (Dec. 1967), 190-196.
 
4
ATIYAH, J. The use of graphic display as an aid to integrated circuit mask generation. Proc. Computer-Aided Design Conf., U. Southampton, England, Apr. 1969, pp. 1-10.
 
5
WOOD, J., ET AL. Computer aided production of masks for silicon integrated circuits. Proc. Computer-Aided Design Conf., U. Southampton, England, Apr. 1969, pp. 122-129.
 
6
ROSENFELD, R. L. Computer assisted mask production. Proc. IEEE 57, 9 (Sept. 1969), 1629-1634.
 
7
FERRARI, D., AND MEZZALIRA, L. A computer-aided approach to integrated circuit layout design. Proc. Conf. Computerized Electronics, Cornell U., Ithaca, N. Y., Aug. 1969, pp. 358-368. Published also in Computer Aided Design 2 (Winter 1970), 19-23.
 
8
RULLY, A. D. A subroutine package for FORTRAN, IBM Syst. J. 7, 3-4 (1968), 248-256.
 
9
HURWITZ, A., CITRON, J. R., AND YEATON, J. B. GRAF: graphic additions to FORTRAN, Proc. AFIPS 1967 SJCC, Vol. 30, AFIPS Press, Montvale, N. J., pp. 553-557.
10
 
11
COMBA, P. G. A language for three dimensional geometry. IBM Syst. J. 7, 3-4 (1968), 292---307.