Synchronizing processors with memory-content-generated interrupts

ABSTRACT

Implementations of the “Lock-Unlock” method of synchronizing processors in a multiprocessor system usually require uninterruptable, memory-pause type instructions. An interlock scheme called read-interlock, which does not require memory-pause instructions, has been developed for a dual DEC PDP-10 system with real-time requirements. The read-interlock method does require a special “read-interlock” instruction in the repertoire of the processors and a special “read-interlock” cycle in the repertoire of the memory modules. When a processor examines a “lock” (a memory location) with a read-interlock instruction, it will be interrupted if the lock was already set; examining a lock immediately sets it if it was not already set (this event sequence is a read-interlock cycle). Writing into a lock clears it. Having the processor interrupted upon encountering a set lock instead of branching is advantageous if the branch would have resulted in an effective interrupt.

REFERENCES

• 1: C. Gordon Bell , A. C. Newell, Computer structures: Readings and examples (McGraw-Hill computer science series), McGraw-Hill Pub. Co., 1971
• 2: Jack B. Dennis , Earl C. Van Horn, Programming semantics for multiprogrammed computations, Communications of the ACM, v.9 n.3, p.143-155, March 1966 [doi>10.1145/365230.365252]
• 3: Hill, J.C. Cycle-allocation disciplines for multi-access memory systems. In Proc. IEEE lnternt. Conf. on Syst. Networks and Computers (Jan. 1971), 688-692.
• 4: A. Shoshani , A. J. Bernstein, Synchronization in a parallel-accessed data base, Communications of the ACM, v.12 n.11, p.604-607, Nov. 1969 [doi>10.1145/363269.363277]
• 5: John Staudhmmer , C. A. Combs , Gordon Wilkinson, Analysis of computer peripheral interference, Proceedings of the 1967 22nd national conference, p.97-101, January 1967, Washington, D.C., United States [doi>10.1145/800196.805979]
• 6: Marvin Zelkowitz, Interrupt driven programming, Communications of the ACM, v.14 n.6, p.417-418, June 1971 [doi>10.1145/362604.362618]

INDEX TERMS

Keywords:
associative memories, debugging, interrupts, microprogramming, monitors, parallel processing, supervisors