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Is marriage in the cards for programmable logic, microprocessors and ASICs?
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays table of contents
Monterey, California, United States
Page: 111  
Year of Publication: 2001
ISBN:1-58113-341-3
Authors
John East  Actel
Tim Garverick  Adaptive Silicon
Scott Hauck  University of Washington
Tavana Tavana  Triscend
Steve Trimberger  Xilinx
Ronnie Vasishta  LSI Logic
Editors
Sinan Kaptanoglu  Adaptive Silicon
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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index terms   collaborative colleagues  

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.3 Design Aids
          Subjects: Hardware description languages

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays


General Terms:
Design, Experimentation, Performance

Collaborative Colleagues:
John East: colleagues
Tim Garverick: colleagues
Scott Hauck: colleagues
Tavana Tavana: colleagues
Steve Trimberger: colleagues
Ronnie Vasishta: colleagues
Sinan Kaptanoglu: colleagues

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