Compiler controlled value prediction using branch predictor based confidence

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Compiler controlled value prediction using branch predictor based confidence

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International Symposium on Microarchitecture archive
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture table of contents

Monterey, California, United States

Pages: 327 - 336

Year of Publication: 2000

ISBN:1-58113-196-8

Authors

Eric Larson	Electrical Engineering and Computer Science, University of Michigan
Todd Austin	Electrical Engineering and Computer Science, University of Michigan

Sponsors

SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE TC - MICRO : IEEE TC - MICRO

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 4, Downloads (12 Months): 23, Citation Count: 3

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	B. Calder, P. Feller, and A. Eustace, Value Profiling and Optimization, in Journal of Instruction-Level Parallelism, March 1999.
	3	Brad Calder , Glenn Reinman , Dean M. Tullsen, Selective value prediction, Proceedings of the 26th annual international symposium on Computer architecture, p.64-74, May 01-04, 1999, Atlanta, Georgia, United States
	4	C. Fu. and T. M. Conte, Value Speculation Mechanisms for EPIC Architectures, Technical Report. Dept. of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-7911, October 1998.
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CITED BY 3

	Huiyang Zhou , Jill Flanagan , Thomas M. Conte, Detecting global stride locality in value streams, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
	Chao-ying Fu , Jill T. Bodine , Thomas M. Conte, Modeling Value Speculation: An Optimal Edge Selection Problem, IEEE Transactions on Computers, v.52 n.3, p.277-292, March 2003
	Sumesh Udayakumaran , Angel Dominguez , Rajeev Barua, Dynamic allocation for scratch-pad memory using compile-time decisions, ACM Transactions on Embedded Computing Systems (TECS), v.5 n.2, p.472-511, May 2006