Frequent value compression in data caches

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Frequent value compression in data caches

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International Symposium on Microarchitecture archive
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture table of contents

Monterey, California, United States

Pages: 258 - 265

Year of Publication: 2000

ISBN:1-58113-196-8

Authors

Jun Yang	Department of Computer Science, The University of Arizona, Tucson, AZ
Youtao Zhang	Department of Computer Science, The University of Arizona, Tucson, AZ
Rajiv Gupta	Department of Computer Science, The University of Arizona, Tucson, AZ

Sponsors

SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE TC - MICRO : IEEE TC - MICRO

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 3, Downloads (12 Months): 51, Citation Count: 19

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	David H. Albonesi, Selective cache ways: on-demand cache resource allocation, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.248-259, November 16-18, 1999, Haifa, Israel
	2	B. Abali and H. Franke: "Operating System Support for Fast Hardware Compression of Main Memory Contents:" Workshop on Solving the Memory Wall Problem: June 2000.
	3	C.D. Benveniste: P.A. Franaszek: and J.T. Robinson: "Cache-Memory Interfaces in Compressed Memory Systems:" Workshop on Solving the Memory Wall Problem: June 2000.
	4	David Brooks , Margaret Martonosi, Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance, Proceedings of the 5th International Symposium on High Performance Computer Architecture, p.13, January 09-12, 1999
	5	Kanad Ghose , Milind B. Kamble, Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation, Proceedings of the 1999 international symposium on Low power electronics and design, p.70-75, August 16-17, 1999, San Diego, California, United States [doi>10.1145/313817.313860]
	6	Norman P. Jouppi, Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers, Proceedings of the 17th annual international symposium on Computer Architecture, p.364-373, May 28-31, 1990, Seattle, Washington, United States
	7	M. Kjelso: M. Gooch: and S. Jones: "Empirical Study of Memory-data: Characteristics and Compressibility:" IEE Computers and Digital Techniques: Vol. 145: No. 1: pages 63-67: January 1998.
	8	Design and Evaluation of a Selective Compressed Memory System, Proceedings of the 1999 IEEE International Conference on Computer Design, p.184, October 10-13, 1999
	9	Charles Lefurgy , Peter Bird , I-Cheng Chen , Trevor Mudge, Improving code density using compression techniques, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.194-203, December 01-03, 1997, Research Triangle Park, North Carolina, United States
	10	Johnson Kin , Munish Gupta , William H. Mangione-Smith, The filter cache: an energy efficient memory structure, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.184-193, December 01-03, 1997, Research Triangle Park, North Carolina, United States
	11	Darko Kirovski , Johnson Kin , William H. Mangione-Smith, Procedure based program compression, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.204-213, December 01-03, 1997, Research Triangle Park, North Carolina, United States
	12	Sergei Yuri Larin , Thomas Conte, Exploiting program redundancy to improve performance, cost and power consumption in embedded systems, 2000
	13	Soner Önder , Rajiv Gupta, Automatic Generation of Microarchitecture Simulators, Proceedings of the 1998 International Conference on Computer Languages, p.80, May 14-16, 1998
	14	Michael Powell , Se-Hyun Yang , Babak Falsafi , Kaushik Roy , T. N. Vijaykumar, Gated-Vdd: a circuit technique to reduce leakage in deep-submicron cache memories, Proceedings of the 2000 international symposium on Low power electronics and design, p.90-95, July 25-27, 2000, Rapallo, Italy [doi>10.1145/344166.344526]
	15	Parthasarathy Ranganathan , Sarita Adve , Norman P. Jouppi, Reconfigurable caches and their application to media processing, Proceedings of the 27th annual international symposium on Computer architecture, p.214-224, June 2000, Vancouver, British Columbia, Canada
	16	Mark Stephenson , Jonathan Babb , Saman Amarasinghe, Bidwidth analysis with application to silicon compilation, Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation, p.108-120, June 18-21, 2000, Vancouver, British Columbia, Canada
	17	W. Ye , N. Vijaykrishnan , M. Kandemir , M. J. Irwin, The design and use of simplepower: a cycle-accurate energy estimation tool, Proceedings of the 37th conference on Design automation, p.340-345, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337436]
	18	Youtao Zhang , Jun Yang , Rajiv Gupta, Frequent value locality and value-centric data cache design, Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, p.150-159, November 2000, Cambridge, Massachusetts, United States

CITED BY 19

	Jun Yang , Rajiv Gupta, Energy efficient frequent value data cache design, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
	Luca Benini , Alberto Macii , Massimo Poncino, Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.1, p.5-32, February 2003
	K. Basu , A. Choudhary , J. Pisharath , M. Kandemir, Power protocol: reducing power dissipation on off-chip data buses, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
	Carlos Molina , Carles Aliagas , Montse García , Antonio Gonzàlez , Jordi Tubella, Non redundant data cache, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
	I. Kadayif , A. Sivasubramaniam , M. Kandemir , G. Kandiraju , G. Chen, Generating physical addresses directly for saving instruction TLB energy, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
	I. Kadayif , A. Sivasubramaniam , M. Kandemir , G. Kandiraju , G. Chen, Optimizing instruction TLB energy using software and hardware techniques, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.10 n.2, p.229-257, April 2005
	Nihar R. Mahapatra , Jiangjiang Liu , Krishnan Sundaresan, The performance advantage of applying compression to the memory system, ACM SIGPLAN Notices, v.38 n.2 supplement, p.86-96, February 2003
	Chun Liu , Anand Sivasubramaniam , Mahmut Kandemir, Optimizing bus energy consumption of on-chip multiprocessors using frequent values, Journal of Systems Architecture: the EUROMICRO Journal, v.52 n.2, p.129-142, February 2006
	Ali-Reza Adl-Tabatabai , Jay Bharadwaj , Michal Cierniak , Marsha Eng , Jesse Fang , Brian T. Lewis , Brian R. Murphy , James M. Stichnoth, Improving 64-Bit Java IPF Performance by Compressing Heap References, Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, p.100, March 20-24, 2004, Palo Alto, California
	Ali-Reza Adl-Tabatabai , Anwar M. Ghuloum , Shobhit O Kanaujia, Compression in cache design, Proceedings of the 21st annual international conference on Supercomputing, June 17-21, 2007, Seattle, Washington
	Shashidhar Mysore , Banit Agrawal , Rodolfo Neuber , Timothy Sherwood , Nisheeth Shrivastava , Subhash Suri, Formulating and implementing profiling over adaptive ranges, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.1, p.1-32, May 2008
	Prateek Pujara , Aneesh Aggarwal, Increasing cache capacity through word filtering, Proceedings of the 21st annual international conference on Supercomputing, June 17-21, 2007, Seattle, Washington
	Alaa R. Alameldeen , David A. Wood, Adaptive Cache Compression for High-Performance Processors, ACM SIGARCH Computer Architecture News, v.32 n.2, p.212, March 2004
	Shashidhar Mysore , Banit Agrawal , Timothy Sherwood , Nisheeth Shrivastava , Subhash Suri, Profiling over Adaptive Ranges, Proceedings of the International Symposium on Code Generation and Optimization, p.147-158, March 26-29, 2006
	Saisanthosh Balakrishnan , Gurindar S. Sohi, Exploiting Value Locality in Physical Register Files, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.265, December 03-05, 2003
	Kiyofumi Tanaka , Takahiro Kawahara, Leakage energy reduction in cache memory by data compression, ACM SIGARCH Computer Architecture News, v.35 n.5, December 2007
	Ozcan Ozturk , Mahmut Kandemir , Guangyu Chen, Access pattern-based code compression for memory-constrained systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.13 n.4, p.1-30, September 2008
	Ping Zhou , Bo Zhao , Yu Du , Yi Xu , Youtao Zhang , Jun Yang , Li Zhao, Frequent value compression in packet-based NoC architectures, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
	Julien Dusser , Thomas Piquet , André Seznec, Zero-content augmented caches, Proceedings of the 23rd international conference on Supercomputing, June 08-12, 2009, Yorktown Heights, NY, USA