ACM Home Page
Please provide us with feedback. Feedback
Thread-level parallelism and interactive performance of desktop applications
Full text PdfPdf (2.94 MB)
Source ACM SIGPLAN Notices archive
Volume 35 ,  Issue 11  (November 2000) table of contents
Pages: 129 - 138  
Year of Publication: 2000
ISSN:0362-1340
Authors
Krisztián Flautner  University of Michigan, 1301 Beal Ave., Ann Arbor, MI
Rich Uhlig  Intel Microprocessor Research Lab, 5350 NE Elam Young Parkway, Hillsboro, OR
Steve Reinhardt  University of Michigan, 1301 Beal Ave., Ann Arbor, MI
Trevor Mudge  University of Michigan, 1301 Beal Ave., Ann Arbor, MI
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 51,   Citation Count: 1
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/356989.357001
What is a DOI?

ABSTRACT

Multiprocessing is already prevalent in servers where multiple clients present an obvious source of thread-level parallelism. However, the case for multiprocessing is less clear for desktop applications. Nevertheless, architects are designing processors that count on the availability of thread-level parallelism. Unlike server workloads, the primary requirement of interactive applications is to respond to user events under human perception bounds rather than to maximize end-to-end throughput. In this paper we report on the thread-level parallelism and interactive response time of a variety of desktop applications. By tracking the communication between tasks, we can focus our measurements on the portions of the benchmark's execution that have the greatest impact on the user. We find that running our benchmarks on a dual-processor machine improves response time of mouse-click events by as much as 36%, and 22% on average---out of a maximum possible 50%. The benefits of multiprocessing are even more apparent when background tasks are considered. In our experiments, running a simple MP3 playback program in the background increases response time by 14% on a uniprocessor while it only increases the response time on a dual processor by 4%. When response times are fast enough for further improvements to be imperceptible, the increased idle time after interactive episodes could be exploited to build systems that are more power efficient.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
2
 
3
K. Diefendorff. Power4 Focuses on Memory Bandwidth: IBM Confronts IA-64, Says ISA Not Important. Microprocessor Report, Volume 13, Number 13, October 6, 1999.
 
4
K. Diefendorff. Compaq Chooses SMT for Alpha: Simultaneous Multithreading Exploits Instruction- and Thread-Level Parallelism. Microprocessor Report, Volume 13, Number 16, December 6, 1999.
5
 
6
K. Flaumer, R. Uhlig, S. Reinhardt, and T. Mudge. Threadlevel parallelism of desktop applications Proceedings of Workshop on Multi-threaded Execution, Architecture and Compilation, Toulouse, France, January 2000.
 
7
8
9
10
11
 
12
13
 
14
M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for Reduced CPU Energy. Proceedings of the First Symposium of Operating Systems Design and Implementation, November 1994.
 
15
Microprocessor Architecture for Java Computing. http:// www.sun.com/microelectronics/MAJC, Sun Microsystems, 1999.
 
16
Press release: Apple Debuts New PowerMac G4s with Dual Processors. http://www.apple.com/pr/library/2000/jul/ 19g4.html
 
17
http ://www.bapco.corn/sys98k.htm
 
18


Collaborative Colleagues:
Krisztián Flautner: colleagues
Rich Uhlig: colleagues
Steve Reinhardt: colleagues
Trevor Mudge: colleagues