Functional Testing of Semiconductor Random Access Memories

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Functional Testing of Semiconductor Random Access Memories

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ACM Computing Surveys (CSUR) archive
Volume 15 , Issue 3 (September 1983) table of contents

Pages: 175 - 198

Year of Publication: 1983

ISSN:0360-0300

Authors

Magdy S. Abadir	Department of Electrical Engineering, University of Southern California, Los Angeles, California
Hassan K. Reghbati	Computing Science Department, Simon Fraser University, Burnaby, British Columbia, Canada V5A 1S6

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 13, Downloads (12 Months): 68, Citation Count: 20

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	Emil Gizdarski, Detection of Delay Faults in Memory Address Decoders, Journal of Electronic Testing: Theory and Applications, v.16 n.4, p.381-387, Aug.2000
	A. J. van de Goor , C. A. Verruijt, An overview of deterministic functional RAM chip testing, ACM Computing Surveys (CSUR), v.22 n.1, p.5-33, March 1990
	L.-C. Wang , M. S. Abadir , J. Zeng, Measuring the effectiveness of various design validation approaches for PowerPCTM microprocessor arrays, Proceedings of the conference on Design, automation and test in Europe, p.273-277, February 23-26, 1998, Le Palais des Congrés de Paris, France
	P. Prinetto , F. Corno , M. Sonza Reorda, Fault tolerant and BIST design of a FIFO cell, Proceedings of the conference on European design automation, p.233-238, September 1996, Geneva, Switzerland
	Said Hamdioui , Rob Wadsworth , John Delos Reyes , Ad J. Van De Goor, Memory Fault Modeling Trends: A Case Study, Journal of Electronic Testing: Theory and Applications, v.20 n.3, p.245-255, June 2004
	Susheel Chandra , Kerry Pierce , Gopal Srinath , Hector R. Sucar , Vic Kulkarni, CrossCheck: An Innovative Testability Solution, IEEE Design & Test, v.10 n.2, p.56-68, April 1993
	S. Hamdioui , A. J. van de Goor, Efficient Tests for Realistic Faults in Dual-Port SRAMs, IEEE Transactions on Computers, v.51 n.5, p.460-473, May 2002
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