Region-based caching

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Region-based caching: an energy-delay efficient memory architecture for embedded processors

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International Conference on Compilers, Architecture and Synthesis for Embedded Systems archive
Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems table of contents

San Jose, California, United States

Pages: 120 - 127

Year of Publication: 2000

ISBN:1-58113-338-3

Authors

Hsien-Hsin S. Lee	Advanced Computer Architecture Lab, Electrical Engineering and Computer Science Department, The University of Michigan, Ann Arbor
Gary S. Tyson	Advanced Computer Architecture Lab, Electrical Engineering and Computer Science Department, The University of Michigan, Ann Arbor

Sponsor

ACM: Association for Computing Machinery

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 37, Citation Count: 15

Additional Information:

cited by collaborative colleagues

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CITED BY 15

	Luca Benini , Alberto Macii , Massimo Poncino, Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.1, p.5-32, February 2003
	Michael Huang , Jose Renau , Seung-Moon Yoo , Josep Torrellas, L1 data cache decomposition for energy efficiency, Proceedings of the 2001 international symposium on Low power electronics and design, p.10-15, August 2001, Huntington Beach, California, United States
	Osman S. Unsal , Raksit Ashok , Israel Koren , C. Mani Krishna , Csaba Andras Moritz, Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.3, p.373-392, August 2003
	Hsien-Hsin S. Lee , Chinnakrishnan S. Ballapuram, Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
	Ben Juurlink , Pepijn de Langen, Dynamic techniques to reduce memory traffic in embedded systems, Proceedings of the 1st conference on Computing frontiers, April 14-16, 2004, Ischia, Italy
	Youfeng Wu , Ryan Rakvic , Li-Ling Chen , Chyi-Chang Miao , George Chrysos , Jesse Fang, Compiler managed micro-cache bypassing for high performance EPIC processors, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
	Zuqiu Mao , Jiaoying Shi, TOIGP: a new hierarchical depth occlusion, Proceedings of the 2006 ACM international conference on Virtual reality continuum and its applications, June 14-April 17, 2006, Hong Kong, China
	Aviral Shrivastava , Ilya Issenin , Nikil Dutt, Compilation techniques for energy reduction in horizontally partitioned cache architectures, Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, September 24-27, 2005, San Francisco, California, USA
	Anand Ramachandran , Margarida F. Jacome, Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Michael J. Geiger , Sally A. McKee , Gary S. Tyson, Drowsy region-based caches: minimizing both dynamic and static power dissipation, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
	Osman S. Unsal , Raksit Ashok , Israel Koren , C. Mani Krishna , Csaba Andras Moritz, Cool-cache for hot multimedia, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
	Rajiv Ravindran , Michael Chu , Scott Mahlke, Compiler-managed partitioned data caches for low power, ACM SIGPLAN Notices, v.42 n.7, July 2007
	Zhiyuan Li , Rong Xu, Page mapping for heterogeneously partitioned caches: Complexity and heuristics, Journal of Embedded Computing, v.1 n.4, p.471-485, December 2005
	Aviral Shrivastava , Ilya Issenin , Nikil Dutt, A compiler-in-the-loop framework to explore horizontally partitioned cache architectures, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
	Chinnakrishnan S. Ballapuram , Ahmad Sharif , Hsien-Hsin S. Lee, Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors, ACM SIGPLAN Notices, v.43 n.3, March 2008

Collaborative Colleagues:

Hsien-Hsin S. Lee: colleagues

Gary S. Tyson: colleagues

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