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Tiled polygon traversal using half-plane edge functions
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Source SIGGRAPH/EUROGRAPHICS Conference On Graphics Hardware archive
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware table of contents
Interlaken, Switzerland
Pages: 15 - 21  
Year of Publication: 2000
ISBN:1-58113-257-3
Authors
Joel McCormack  Compaq Computer Corporation, Western Research Laboratory, 250 University Avenue, Palo Alto, CA
Robert McNamara  Compaq Computer Corporation, Systems Research Center, 130 Lytton Avenue, Palo Alto, CA
Sponsors
Eurographics :
SIGGRAPH: ACM Special Interest Group on Computer Graphics and Interactive Techniques
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 74,   Citation Count: 9
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ABSTRACT

Existing techniques for traversing a polygon generate fragments one (or more) rows or columns at a time. (A fragment is all the information needed to paint one pixel of the polygon.) This order is non-optimal for many operations. For example, most frame buffers are tiled into rectangular pages, and there is a cost associated with accessing a different page. Pixel processing is more efficient if all fragments of a polygon on one page are generated before any fragments on a different page. Similarly, texture caches have reduced miss rates if fragments are generated in tiles (and even tiles of tiles) whose size depends upon the cache organization. We describe a polygon traversal algorithm that generates fragments in a tiled fashion. That is, it generates all fragments of a polygon within a rectangle (tile) before generating any fragments in another rectangle. For a single level of tiling, our algorithm requires one additional saved context (the values of all interpolator accumulators, such as Z depth, Red, Green, Blue, etc.) over a traditional traversal algorithm based upon half-plane edge functions. An additional level of tiling requires another saved context for the special case of rectangle copies, or three more for the general case. We describe how to use this algorithm to generate fragments in an optimal order for several common scenarios.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Brian Kelleher. PixelVision Architecture, Technical Note 1998-013, System Research Center, Compaq Computer Corporation, October 1998, available at http:// www.research.digital.com/SRC/publications/src-tn.html.
 
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Joel McCormack, Robert McNamara, Chris Gianos, Larry Seiler, Norman Jouppi, Ken Correll, Todd Dutton & John Zurawski. Neon: A (Big) (Fast) Single-Chip 3D Workstation Graphics Accelerator. Research Report 98/1, Western Research Laboratory, Compaq Computer Corporation, Revised July 1999, available at http:// www.research.compaq.com/wrl/techreports/pubslist.html.
 
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Joel McCormack & Robert McNamara. Efficient and Tiled Polygon Traversal Using Half-Plane Edge Functions. Research Report 2000/4, Western Research Laboratory, Compaq Computer Corporation, August 2000, available at http://www.research.compaq.com/wrl/techreports/ pubslist.html.
 
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CITED BY  9

Collaborative Colleagues:
Joel McCormack: colleagues
Robert McNamara: colleagues