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Low-power digital filtering using multiple voltage distribution and adaptive voltage scaling (poster session)
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2000 international symposium on Low power electronics and design table of contents
Rapallo, Italy
Pages: 207 - 209  
Year of Publication: 2000
ISBN:1-58113-190-9
Authors
Sandeep Dhar  Department of Electrical and Computer Engineering, University of Colorado, Boulder, CO
Dragan Maksimović  Department of Electrical and Computer Engineering, University of Colorado, Boulder, CO
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 6,   Downloads (12 Months): 18,   Citation Count: 5
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ABSTRACT

This paper describes an adaptive power management architecture to reduce power consumption in digital filters. The proposed approach combines two low-power techniques which utilize supply voltage reduction. The first technique, multiple voltage distribution (MVD), attempts to reduce power consumption by assigning reduced supply voltages to circuit modules while satisfying timing constraints. The second technique, adaptive voltage scaling (AVS), dynamically adjusts these multiple voltages to meet throughput requirements resulting in further power reduction. An FIR filter application using the combined MVD-AVS power management scheme for two adaptively scaled supply voltages is shown to consume one-third the power of a fixed supply voltage scheme, and half the power consumed with a single supply AVS.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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T. Kuroda et. al.,\Variable Supply Voltage Scheme for Low Power High Speed CMOS Digital Design", IEEE Journal of Solid-State Circuits, vol. 33, Mar. 1998.
 
3
J. Ludwig,S. Nawab,A. Chandrakasan, \Low-Power Digital Filtering Using Approximate Processing", IEEE Journal of Solid-State Circuits, vol. 31, Mar. 1996.
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J. Goodman, A. Dancy, A. Chandrakasan., \An Energy/Security Scalable Encryption Processor Using an Embedded Variable Voltage DC/DC Converter", IEEE Journal of Solid-State Circuits, Vol. 33, Nov. 1998.


Collaborative Colleagues:
Sandeep Dhar: colleagues
Dragan Maksimović: colleagues