| Model and analysis for combined package and on-chip power grid simulation |
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International Symposium on Low Power Electronics and Design
archive
Proceedings of the 2000 international symposium on Low power electronics and design
table of contents
Rapallo, Italy
Pages: 179 - 184
Year of Publication: 2000
ISBN:1-58113-190-9
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Authors
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Rajendran Panda
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Motorola, Inc., Austin, TX
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David Blaauw
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Motorola, Inc., Austin, TX
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Rajat Chaudhry
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Motorola, Inc., Austin, TX
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Vladimir Zolotov
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Motorola, Inc., Austin, TX
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Brian Young
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Motorola, Inc., Austin, TX
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Ravi Ramaraju
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Motorola, Inc., Austin, TX
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Downloads (6 Weeks): 20, Downloads (12 Months): 57, Citation Count: 18
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ABSTRACT
We present new modeling and simulation techniques to improve the accuracy and efficiency of transient analysis of large power disðtribution grids. These include an accurate model for the inherent decoupling capacitance of non-switching devices, as well as a staðtistical switching current model for the switching devices. Moreðover, three new simulation techniques are presented for problem size-reduction and speed-up. Results of application of these techðniques on three PowerPCtmmicroprocessors are also presented.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1145/313817.313905]
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Abhijit Dharchoudhury , Rajendran Panda , David Blaauw , Ravi Vaidyanathan , Bogdan Tutuianu , David Bearden, Design and analysis of power distribution networks in PowerPC microprocessors, Proceedings of the 35th annual conference on Design automation, p.738-743, June 15-19, 1998, San Francisco, California, United States
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CITED BY 19
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Kaushik Gala , David Blaauw , Junfeng Wang , Vladimir Zolotov , Min Zhao, Inductance 101: analysis and design issues, Proceedings of the 38th conference on Design automation, p.329-334, June 2001, Las Vegas, Nevada, United States
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Min Zhao , Kaushik Gala , Vladimir Zolotov , Yuhong Fu , Rajendran Panda , R. Ramkumar , Bhuwan Agrawal, Worst case clock skew under power supply variations, Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems, December 02-03, 2002, Monterey, California, USA
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Sanjay Pant , David Blaauw , Vladimir Zolotov , Savithri Sundareswaran , Rajendran Panda, A stochastic approach To power grid analysis, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
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Min Zhao , Yuhong Fu , Vladimir Zolotov , Savithri Sundareswaran , Rajendran Panda, Optimal placement of power supply pads and pins, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
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D. Barros Júnior , M. Rodriguez-Irago , M. B. Santos , I. C. Teixeira , F. Vargas , J. P. Teixeira, Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip, Journal of Electronic Testing: Theory and Applications, v.21 n.4, p.349-363, August 2005
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