Power consumption reduction in high-speed ΣΔ bandpass modulators

ABSTRACT

Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which allow to efficiently implement a number of analog functions. Among them, SC &Sgr;&Dgr; modulators are very popular for A/D conversion: in this kind of circuits, operational amplifiers are the most consuming cells because of their requirements in terms of DC gain and unity-gain frequency. A new amplifier with 110dB DC gain and a unity-gain frequency of 250MHz is presented. The large power consumption (20mW) makes critical its use in commercial applications: however, combining this cell with a fast adaptive biasing circuit, high performance may be achieved with a reasonable dissipation.This approach has been used in the design of a 6th-order bandpass &Sgr;&Dgr; modulator featuring 73dB DR and suitable for the conversion at IF (10.7MHz) of the FM radio signal.

REFERENCES

• 1: K.Martin and A.Sedra, "Effects of the op amp finite gain and bandwidth on the performance of switched-capacitor filters", IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp. 822-829, August 1981.
• 2: D. B. Ribner and M. A. Copeland, Biquad alternatives for highfrequency switched-capacitor filters, IEEE Journal of Solid-State Circuits, vol. SC-20, no. 6, pp. 1085-1095, December 1985.
• 3: K.L.Lee and R.G.Meyer, Low distortion switched-capacitor filter design techniques, IEEE Journal of Solid-State Circuits, vol. SC- 20, pp. 1103-1113, December 1985.
• 4: M.G.Degrauwe, J.Rijmenants, E.A.Vittoz and H.DeMan, Adaptive biasing CMOS amplifiers, IEEE Journal of Solid-State Circuits, vol. SC-17, pp. 522-528, June 1982.
• 5: R.Castello and P.Gray, A High-Performance Micropower Switched- Capacitor filter, IEEE Journal of Solid-State Circuits, vol. SC-20, no. 6, pp. 1122-1132, December 1985.
• 6: K.Bult and G.Geelen, A Fast-Settling CMOS Op Amp for SC Circuits with 90-dB DC Gain, IEEE Journal of Solid-State Circuits, vol. 25, no. 6, pp. 1379-1384, December 1990.
• 7: D.Tonietto, P.Cusinato, F.Stefani and A.Baschirotto, A 3.3V CMOS 10.7MHz 6th-order bandpass Sigma-Delta modulator with 78dB dynamic range, Proceedings ESSCIRC '99, pp. 78-81, September 1999.
• 8: S.R.Norsworthy, R.Schreier and G.C.Temes, Eds., Delta-Sigma Data Converters. Theory, Design and Simulation, Piscataway, NJ: IEEE Press, 1997.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

Additional Classification:
  B. Hardware
  B.8 Performance and Reliability

General Terms:
Design, Performance, Theory