A generic architecture for on-chip packet-switched interconnections

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A generic architecture for on-chip packet-switched interconnections

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Paris, France

Pages: 250 - 256

Year of Publication: 2000

ISBN:1-58113-244-1

Authors

Pierre Guerrier	Université Pierre et Marie Curie 4, place Jussieu, F-75252 Paris Cedex 05
Alain Greiner	Université Pierre et Marie Curie 4, place Jussieu, F-75252 Paris Cedex 05

Sponsors

EDAA : European Design Automation Association
SIGDA: ACM Special Interest Group on Design Automation
ECSI :
RAS : RAS
EDAC : Electronic Design Automation Consortium
IEEE-CS : Computer Society
IFIP : International Federation for Information Processing

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ACM New York, NY, USA

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Downloads (6 Weeks): 22, Downloads (12 Months): 165, Citation Count: 125

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REFERENCES

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