The generalized boundary curve — a common method for automatic nominal design centering of analog circuits

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The generalized boundary curve — a common method for automatic nominal design centering of analog circuits

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Paris, France

Pages: 42 - 47

Year of Publication: 2000

ISBN:1-58113-244-1

Authors

R. Schwencker	Institute of Electronic Design Automation, Technical University of Munich, 81609 Munich, Germany and Infineon Technologies, P.O. Box 80 09 49, 81617 Munich, Germany
F. Schenkel	Institute of Electronic Design Automation, Technical University of Munich, 81609 Munich, Germany
H. Graeb	Institute of Electronic Design Automation, Technical University of Munich, 81609 Munich, Germany
K. Antreich	Institute of Electronic Design Automation, Technical University of Munich, 81609 Munich, Germany

Sponsors

EDAA : European Design Automation Association
SIGDA: ACM Special Interest Group on Design Automation
ECSI :
RAS : RAS
EDAC : Electronic Design Automation Consortium
IEEE-CS : Computer Society
IFIP : International Federation for Information Processing

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 13, Citation Count: 3

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 3

	Georges G. E. Gielen , Rob A. Rutenbar, Synthesis of analog and mixed-signal integrated electronic circuits, Formal engineering design synthesis, Cambridge University Press, New York, NY, 2001
	M. Bühler , J. Koehl , J. Bickford , J. Hibbeler , U. Schlichtmann , R. Sommer , M. Pronath , A. Ripp, DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Arpad Burmen , Janez Puhan , Tadej Tuma, Defining Cost Functions for Robust IC Design and Optimization, Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum, p.20196, March 03-07, 2003