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Run-time voltage hopping for low-power real-time systems
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 37th Annual Design Automation Conference table of contents
Los Angeles, California, United States
Pages: 806 - 809  
Year of Publication: 2000
ISBN:1-58113-187-9
Authors
Seongsoo Lee  Center for Collaborative Research and Institute of Industrial Science, University of Tokyo, Japan
Takayasu Sakurai  Center for Collaborative Research and Institute of Industrial Science, University of Tokyo, Japan
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 9,   Downloads (12 Months): 63,   Citation Count: 39
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ABSTRACT

This paper presents a novel run-time dynamic voltage scaling scheme for low-power real-time systems. It employs software feedback control of supply voltage, which is applicable to off-the-shelf processors. It avoids interface problems from variable clock frequency. It provides efficient power reduction by fully exploiting slack time arising from workload variation. Using software analysis environment, the proposed scheme is shown to achieve 80~94% power reduction for typical real-time multimedia applications.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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T. Burd, T. Pering, A. Stratakos, and R. Brodersen, "A dynamic voltage scaled microprocessor system," Proceedings of IEEE International Solid-State Circuits Conference, pp. 294-295, 2000.
 
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V. Gutnik and A. Chandrakasan, "An efficient controller for variable supply-voltage low power processing," Proceedings of IEEE Symposium on VLSI Circuits, pp. 158-159, 1996.
 
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S. Lim, Y. Bae, G. Jang, B. Rhee, S. Min, C. Park, H. Shin, K. Park, and C. Kim, "An accurate worst case timing analysis for RISC proecssors," Proceedings of IEEE Real-time Systems Symposium, pp. 97-108, 1994.
 
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T. Sakurai and A. Newton, "Alpha-power law MOSFET model and its application to CMOS inverter delay and other formulas," IEEE Journal of Solid State Circuits, vol. 25, no. 2, pp. 584-594, Apr. 1990.

CITED BY  40

Collaborative Colleagues:
Seongsoo Lee: colleagues
Takayasu Sakurai: colleagues