Closing the gap between ASIC and custom

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Closing the gap between ASIC and custom: an ASIC perspective

Source

Annual ACM IEEE Design Automation Conference archive
Proceedings of the 37th Annual Design Automation Conference table of contents

Los Angeles, California, United States

Pages: 637 - 642

Year of Publication: 2000

ISBN:1-58113-187-9

Authors

D. G. Chinnery
K. Keutzer

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Citation Count: 13

Additional Information:

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ABSTRACT

We investigate the differences in speed between application-specific integrated circuits and custom integrated circuits when each are implemented in the same process technology, with some examples in 0.25 micron CMOS. We first attempt to account for the elements that make the performance different and then examine ways in which tools and methodologies may close the performance gap between application-specific integrated circuits and custom circuits.

CITED BY 13

	D. G. Chinnery , B. Nikolic , K. Keutzer, Achieving 550 MHz in an ASIC methodology, Proceedings of the 38th conference on Design automation, p.420-425, June 2001, Las Vegas, Nevada, United States
	Dennis Sylvester , Himanshu Kaul, Future performance challenges in nanometer design, Proceedings of the 38th conference on Design automation, p.3-8, June 2001, Las Vegas, Nevada, United States
	Michael Orshansky , Kurt Keutzer, A general probabilistic framework for worst case timing analysis, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Frederik Vermeulen , Francky Catthoor , Lode Nachtergaele , Diederik Verkest , Hugo De Man, Power-efficient flexible processor architecture for embedded applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.3, p.376-385, June 2003
	Victor Zyuban , Sameh W. Asaad , Thomas W. Fox , Anne-Marie Haen , Daniel Littrell , Jaime H. Moreno, Design methodology for semi custom processor cores, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
	Shih-Chieh Chang , Cheng-Tao Hsieh , Kai-Chiang Wu, Re-synthesis for delay variation tolerance, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Henrik Eriksson , Per Larsson-Edefors , Tomas Henriksson , Christer Svensson, Full-custom vs. standard-cell design flow: an adder case study, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Michael Orshansky , Wei-Shen Wang , Martine Ceberio , Gang Xiang, Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips, Proceedings of the 2006 ACM symposium on Applied computing, April 23-27, 2006, Dijon, France
	Tao Luo , David Newmark , David Z. Pan, A new LP based incremental timing driven placement for high performance designs, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	Francisco J. Mesa-Martínez , Michael C. Huang , Jose Renau, SEED: scalable, efficient enforcement of dependences, Proceedings of the 15th international conference on Parallel architectures and compilation techniques, September 16-20, 2006, Seattle, Washington, USA
	Lesley Shannon , Paul Chow, SIMPPL: an adaptable SoC framework using a programmable controller IP interface to facilitate design reuse, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.15 n.4, p.377-390, April 2007
	Andreas Wortmann , Sven Simon , Matthias Müller, A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core, Proceedings of the conference on Design, automation and test in Europe, p.30046, February 16-20, 2004
	Mingoo Seok , Dennis Sylvester , David Blaauw, Optimal technology selection for minimizing energy and variability in low voltage applications, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India