Designing systems-on-chip using cores

ABSTRACT

Leading-edge systems-on-chip (SoC) being designed today could reach 20 Million gates and 0.5 to 1 GHz operating frequency. In order to implement such systems, designers are increasingly relying on reuse of Intellectual property (IP) blocks. Since IP blocks are pre-designed and pre-verified, the designer can concentrate on the complete system without having to worry about the correctness or performance of the individual components. That is the goal, in theory. In practice, assembling on SoC using IP blocks is still an error-prone, labor-intensive and time-consuming process. This paper discusses the main challenges in SoC designs using IP blocks and elaborates on the methodology and tools being put in place at IBM for addressing the problem. It explains IBM's SoC architecture and gives algorithmic details on the high-level tools being developed for SoC design.

REFERENCES

• 1: "AMBA Specification Overview", ARM, http://www.arm.com/Pro+Peripherals/AMBA.
• 2: Guido Arnout, SystemC standard, Proceedings of the 2000 conference on Asia South Pacific design automation, p.573-578, January 2000, Yokohama, Japan [doi>10.1145/368434.368808]
• 3: "Blue Logic Technology", IBM, http://www.chips.ibm.com/bluelogic.
• 4: Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
• 5: Peter L. Flake , Simon J. Davidmann, Superlog, a unified design language for system-on-chip, Proceedings of the 2000 conference on Asia South Pacific design automation, p.583-586, January 2000, Yokohama, Japan [doi>10.1145/368434.368814]
• 6: A. Rincon, W. Lee and M. Slatery, "The Changing Landscape of System-on-a-Chip Design", IBM MicroNews, 3rd Quarter 1999, Vol.5, No.3, IBM Microelectronics.
• 7: E Schindler, K. Weidenbacher and T. Zimmermann, "IP Repository, A Web based IP Reuse Infrastructure", Proceedings of IEEE 1999 Custom Integrated Circuits Conference, May 1999.
• 8: "The CoreConnectTM Bus Architecture" IBM, 1999, http://www.chips.ibm.com/product/coreconnect/docs/ crcon_wp.pdf
• 9: VSI AllianceTM Architecture Document, Version 1.0, VSI Alliance, 1997, http://www.vsi.com/the_rest.html.

INDEX TERMS

Primary Classification:
  J. Computer Applications

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Advanced technologies
  B.8 Performance and Reliability

  C. Computer Systems Organization

General Terms:
Algorithms, Design, Performance, Theory