| A codesign virtual machine for hierarchical, balanced hardware/software system modeling |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 37th Annual Design Automation Conference
table of contents
Los Angeles, California, United States
Pages: 390 - 395
Year of Publication: 2000
ISBN:1-58113-187-9
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Authors
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JoAnn M. Paul
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Center for Electronic Design Automation, Carnegie Mellon University, Pittsburgh, PA
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Simon N. Peffers
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Center for Electronic Design Automation, Carnegie Mellon University, Pittsburgh, PA
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Donald E. Thomas
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Center for Electronic Design Automation, Carnegie Mellon University, Pittsburgh, PA
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Downloads (6 Weeks): 3, Downloads (12 Months): 19, Citation Count: 4
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ABSTRACT
The Codesign Virtual Machine (CVM) is introduced as a next generation system modeling semantic. The CVM permits unrestricted system-wide software and hardware behaviors to be designed to a single scheduling semantic by resolving time-based (resource) and time-independent (state-interleaved) models of computation. CVM hierarchical relationships of bus and clock state domains provide a means of exploring hardware/software scheduling trade-offs to a consistent semantic model using top-down, bottom-up and iterative design approaches from a high system level to the machine implementation. State domain partitionings permit run-time software schedulers to be resolved with design time physical scheduling as peer- and hierarchically-related architectural abstractions which cut across functional boundaries. The resultant abstraction provides “component-less” paths to physical design with greater accommodation of shared resource modeling. A simulation example is included.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Felice Balarin , Massimiliano Chiodo , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Claudio Passerone , Alberto Sangiovanni-Vincentelli , Ellen Sentovich , Kei Suzuki , Bassam Tabbara, Hardware-software co-design of embedded systems: the POLIS approach, Kluwer Academic Publishers, Norwell, MA, 1997
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J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. Lee, et. al, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, Berkeley. July 1999.
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D. Gajski, F. Vahid, S. Narayan, J. Gong. "SpecSyn: An Environment Supporting the Specify-Explore-Refine Paradigm for Hardware/Software System Design," IEEE Transactions on VLSI Systems, Vol. 6, No. 1. March, 1998.
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CITED BY 4
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Brett H. Meyer , Joshua J. Pieper , JoAnn M. Paul , Jeffrey E. Nelson , Sean M. Pieper , Anthony G. Rowe, Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors, IEEE Transactions on Computers, v.54 n.6, p.684-697, June 2005
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