| Compiling Esterel into sequential code |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 37th Annual Design Automation Conference
table of contents
Los Angeles, California, United States
Pages: 322 - 327
Year of Publication: 2000
ISBN:1-58113-187-9
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Author
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Stephen A. Edwards
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Advanced Technology Group, Synopsys, 700 East Middlefield Road, Mountain View, California
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Downloads (6 Weeks): 5, Downloads (12 Months): 19, Citation Count: 16
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ABSTRACT
Embedded real-time software systems often need fine-grained parallelism and precise control over time, things typical real-time operating systems do not provide. The Esterel language has both, but Existing compilers produce slow code for large programs.
This paper presents the first Esterel compiler able to produce small, fast code for large programs. It can produce code half the size and up to a hundred times faster than code from existing compilers. Esterel's semantics allow the compiler to statically schedule concurrency and synthesize code that efficiently and predictably simulates context switches. The main contribution is an algorithm that synthesizes an efficient sequential program from the concurrent control-flow graph used as an intermediate representation. These techniques could be applied to any language with fine-grained parallelism.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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G. Berry. Esterel on hardware. Philosophical Transactions of the Royal Society of London. Series A, 339:87-1o4, 1992.
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G. Berry. The constructive semantics of pure Esterel. Book in preparation, 1996.
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Gérard Berry , Amar Bouali , Xavier Fornari , Emmanuel Ledinot , Eric Nassor , Robert de Simone, Esterel: a formal method applied to avionic software development, Science of Computer Programming, v.36 n.1, p.5-25, Jan.1.2000
[doi> 10.1016/S0167-6423(99)00015-5]
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V. Bertin, M. Poize, and J. Pulou. Une nouvelle m4thode de compilation pour le language ESTEREL {A new method for compiling the Esterel language}. In Proceedings of GRAISyHM-AAA, Lille, France, Mar. 1999. In French.
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Massimiliano Chiodo , Daniel Engels , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Kei Suzuki , Alberto Sangiovanni-Vincentelli, A case study in computer-aided co-design of embedded controllers, Design Automation for Embedded Systems, v.1 n.1-2, p.51-67, Jan. 1996
[doi> 10.1007/BF00134683]
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Massimiliano Chiodo , Paolo Guisto , Attila Jurecska , Luciano Lavagno , Ellen Sentovich , Harry Hsieh , Kei Suzuki , Alberto Sangiovanni-Vincentelli, Synthesis of software programs for embedded control application, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.587-592, June 12-16, 1995, San Francisco, California, United States
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François Clouté , Jean-Noël Contensou , Daniel Esteve , Pascal Pampagnin , Philippe Pons , Yves Favard, Hardware/software co-design of an avionics communication protocol interface system: an industrial case study, Proceedings of the seventh international workshop on Hardware/software codesign, p.48-52, March 1999, Rome, Italy
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Marco Sgroi , Luciano Lavagno , Yosinori Watanabe , Alberto Sangiovanni-Vincentelli, Synthesis of embedded software using free-choice Petri nets, Proceedings of the 36th ACM/IEEE conference on Design automation, p.805-810, June 21-25, 1999, New Orleans, Louisiana, United States
[doi> 10.1145/309847.310073]
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Berry et al.'s Esterel site: http://www.inria.fr/meije/esterel/
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CITED BY 16
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Massimo Baleani , Frank Gennari , Yunjian Jiang , Yatish Patel , Robert K. Brayton , Alberto Sangiovanni-Vincentelli, HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform, Proceedings of the tenth international symposium on Hardware/software codesign, May 06-08, 2002, Estes Park, Colorado
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Fernando Herrera , Pablo Sánchez , Eugenio Villar, Modeling of CSP, KPN and SR systems with systemC, Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL'03, Kluwer Academic Publishers, Norwell, MA, 2004
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