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Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 37th Annual Design Automation Conference table of contents
Los Angeles, California, United States
Pages: 247 - 252  
Year of Publication: 2000
ISBN:1-58113-187-9
Authors
Janet M. Wang  Dept. of EECS, University of California at Berkeley, CA
Tuyen V. Nguyen  IBM Austin Research Laboratory, Austin, TX
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 16,   Citation Count: 19
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ABSTRACT

This paper presents a method for general reduced order analysis of linear circuits with a large number of independent sources. This type of circuit is used to model the power grid in power supply noise analysis for example. The large size of the linear circuit model renders circuit simulation inefficient. The large number of independent sources makes conventional multi-port model reduction ineffective. In order to address these problems, this paper proposes an extended Krylov subspace method which constructs a transformation matrix based on the dynamics of the circuit as well as the source excitations, thus avoiding the multi-port problem of model reduction. The transformation matrix is then used to reduce the given circuit to a smaller circuit model, which allows for more efficient analysis.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
H.H. Chen and J. S. Neely, "Interconnect and circuit modeling techniques for full chip power supply noise analysis," IEEE Trans. Compon. Packag. Manuf Technol. B, Adv. Packag., Vol.21, pp. 209-15, Aug. 1998.
 
2
L. Pillage and R. A. Rohrer, "Asymptotic Waveform Evaluation for timing analysis", IEEE Trans. on Computer-aided design, vol. 9, pp. 352-366, April, 1990.
 
3
P. Feldmann and R. W. Freund, "Efficient Linear Circuit Analysis by Pad6 Approximation via the Lanczos Process," IEEE Trans. Computer- Aided Design, vol. 14, pp. 639-649, May 1995.
 
4
A. Odabasioglu, M. Celik, and L. T. Pileggi, "PRIMA: passive reduced order interconnect macromodeling algorithm," IEEE Trans. Computer- Aided Design, vol. 17, pp. 645-654, August 1998.
5
 
6
J.C. Shah, A. A. Younis, S. S. Sapatnekar, and M. M. Hassoun, "An algorithm for simulating power/ground networks using Pade approximants and its symbolic implementation ," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., Vol.45, pp. 1372-82, Oct. 1998
 
7
E. Chiprout and T. Nguyen, "Power analysis of large interconnect grids withmultiple sources using model reduction", European Conference on Circuit Theory and Design, Stressa, Italy, Sept. 1999.
 
8
J.Wang, T, Nuyen, "Extended Krylov Subspace Mehtod for power grid analysis",ERL Memorandum 2000.

CITED BY  19

Collaborative Colleagues:
Janet M. Wang: colleagues
Tuyen V. Nguyen: colleagues