Fast power grid simulation

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Fast power grid simulation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 37th Annual Design Automation Conference table of contents

Los Angeles, California, United States

Pages: 156 - 161

Year of Publication: 2000

ISBN:1-58113-187-9

Authors

Sani R. Nassif	IBM Austin Research Laboratory, 11501 Burnet Rd., Austin, TX
Joseph N. Kozhaya	ECE Department, University of Illinois, 1308 W. Main St., Urbana, IL

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 19, Downloads (12 Months): 93, Citation Count: 41

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abstract references cited by index terms collaborative colleagues

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ABSTRACT

The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance limiting factors [1, 2, 3], then their analysis is important in order to (1) predict the performance and (2) improve the performance if necessary. Thus, there is a clear need for new efficient, in terms of both execution time and memory, techniques for power grid analysis. This paper discusses the modeling of power grids and proposes a new PDE-like multigrid method for the simulation of power grids. The proposed method is very efficient and suitable for both DC and transient simulation of power grids.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 41

	Hui Zheng , Lawrence T. Pileggi, Modeling and analysis of regular symmetrically structured power/ground distribution networks, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Sani R. Nassif, Modeling and forecasting of manufacturing variations (embedded tutorial), Proceedings of the 2001 conference on Asia South Pacific design automation, p.145-150, January 2001, Yokohama, Japan
	Tsung-Hao Chen , Charlie Chung-Ping Chen, Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods, Proceedings of the 38th conference on Design automation, p.559-562, June 2001, Las Vegas, Nevada, United States
	Sani R. Nassif , Onsi Fakhouri, Technology trends in power-grid-induced noise, Proceedings of the 2002 international workshop on System-level interconnect prediction, April 06-07, 2002, San Diego, California, USA
	Joseph N. Kozhaya , Sani R. Nassif , Farid N. Najm, Multigrid-like technique for power grid analysis, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Abhishek Singh , Jim Plusquellic , Dhananjay Phatak , Chintan Patel, Defect Simulation Methodology for iDDT Testing, Journal of Electronic Testing: Theory and Applications, v.22 n.3, p.255-272, June 2006
	Haihua Su , Emrah Acar , Sani R. Nassif, Power grid reduction based on algebraic multigrid principles, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Kai Wang , Malgorzata Marek-Sadowska, On-chip power supply network optimization using multigrid-based technique, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Chintan Patel , Ernesto Staroswiecki , Smita Pawar , Dhruva Acharyya , Jim Plusquellic, Defect Diagnosis Using a Current Ratio Based Quiescent Signal Analysis Model for Commercial Power Grids, Journal of Electronic Testing: Theory and Applications, v.19 n.6, p.611-623, December 2003
	Yici Cai , Zhu Pan , Shelton X-D Tan , Xianlong Hong , Wenting Hou , Lifeng Wu, Relaxed hierarchical power/ground grid analysis, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
	M. Graziano , G. Masera , G. Piccinini , M. Zamboni, Hierarchical power supply noise evaluation for early power grid design prediction, Proceedings of the 2001 international workshop on System-level interconnect prediction, p.183-188, March 31-April 01, 2001, Sonoma, California, United States
	Peng Li, Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
	Shen Lin , Norman Chang, Challenges in power-ground integrity, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Kai Wang , Malgorzata Marek-Sadowska, Clock network sizing via sequential linear programming with time-domain analysis, Proceedings of the 2004 international symposium on Physical design, April 18-21, 2004, Phoenix, Arizona, USA
	Sanjay Pant , David Blaauw , Vladimir Zolotov , Savithri Sundareswaran , Rajendran Panda, A stochastic approach To power grid analysis, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Amir H. Ajami , Kaustav Banerjee , Massoud Pedram, Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI, Analog Integrated Circuits and Signal Processing, v.42 n.3, p.277-290, March 2005
	Haihua Su , Jiang Hu , Sachin S. Sapatnekar , Sani R. Nassif, Congestion-driven codesign of power and signal networks, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Shiyou Zhao , Kaushik Roy , Cheng Kok Koh, Frequency domain analysis of switching noise on power supply network, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Zhengyong Zhu , Bo Yao , Chung-Kuan Cheng, Power network analysis using an adaptive algebraic multigrid approach, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	David E. Lackey , Paul S. Zuchowski , Thomas R. Bednar , Douglas W. Stout , Scott W. Gould , John M. Cohn, Managing power and performance for System-on-Chip designs using Voltage Islands, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.195-202, November 10-14, 2002, San Jose, California
	Zhanhai Qin , Chung-Kuan Cheng, RCLK-VJ network reduction with Hurwitz polynomial approximation, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	M. Graziano , G. Masera , G. Piccinini , M. Zamboni, Power Supply Design Parameters for Switching-Noise Control in Deep-Submicron Circuits Design Flows, Analog Integrated Circuits and Signal Processing, v.31 n.3, p.225-248, June 2002
	Haihua Su , Sachin S. Sapatnekar , Sani R. Nassif, An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
	R. Berridge , R. M. Averill, III , A. E. Barish , M. A. Bowen , P. J. Camporese , J. DiLullo , P. E. Dudley , J. Keinert , D. W. Lewis , R. D. Morel , T. Rosser , N. S. Schwartz , P. Shephard , H. H. Smith , D. Thomas , P. J. Restle , J. R. Ripley , S. L. Runyon , P. M. Williams, IBM POWER6 microprocessor physical design and design methodology, IBM Journal of Research and Development, v.51 n.6, p.685-714, November 2007
	K. Bernstein , D. J. Frank , A. E. Gattiker , W. Haensch , B. L. Ji , S. R. Nassif , E. J. Nowak , D. J. Pearson , N. J. Rohrer, High-performance CMOS variability in the 65-nm regime and beyond, IBM Journal of Research and Development, v.50 n.4/5, p.433-449, July 2006
	Praveen Ghanta , Sarma Vrudhula , Sarvesh Bhardwaj , Rajendran Panda, Stochastic variational analysis of large power grids considering intra-die correlations, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	Jeffrey Fan , Sheldon X. -D. Tan , Yici Cai , Xianlong Hong, Partitioning-based decoupling capacitor budgeting via sequence of linear programming, Integration, the VLSI Journal, v.40 n.4, p.516-524, July, 2007
	Peng Li, Variational analysis of large power grids by exploring statistical sampling sharing and spatial locality, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.645-651, November 06-10, 2005, San Jose, CA
	Sanjay Pant , D. Blaauw, Static timing analysis considering power supply variations, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.365-371, November 06-10, 2005, San Jose, CA
	Jeffrey Fan , I-Fan Liao , X.-D Sheldon , Yici Cai , Xianlong Hong, Localized On-Chip Power Delivery Network Optimization via Sequence of Linear Programming, Proceedings of the 7th International Symposium on Quality Electronic Design, p.272-277, March 27-29, 2006
	Andrew B. Kahng , Bao Liu , Sheldon Tan, SMM: Scalable Analysis of Power Delivery Networks by Stochastic Moment Matching, Proceedings of the 7th International Symposium on Quality Electronic Design, p.638-643, March 27-29, 2006
	Sanjay Pant , David Blaauw , Vladimir Zolotov , Savithri Sundareswaran , Rajendran Panda, Vectorless Analysis of Supply Noise Induced Delay Variation, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.184, November 09-13, 2003
	Kai Wang , Malgorzata Marek-Sadowska, Power/Ground Mesh Area Optimization Using Multigrid-Based Technique, Proceedings of the conference on Design, Automation and Test in Europe, p.10850, March 03-07, 2003
	Praveen Ghanta , Sarma Vrudhula , Rajendran Panda , Janet Wang, Stochastic Power Grid Analysis Considering Process Variations, Proceedings of the conference on Design, Automation and Test in Europe, p.964-969, March 07-11, 2005
	Duo Li , Sheldon X.-D. Tan , Bruce McGaughy, ETBR: extended truncated balanced realization method for on-chip power grid network analysis, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
	Sani R. Nassif, Power grid analysis benchmarks, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
	Yici Cai , Jin Shi , Zhu Pan , Xianlong Hong , Sheldon X. -D. Tan, Large scale P/G grid transient simulation using hierarchical relaxed approach, Integration, the VLSI Journal, v.41 n.1, p.153-160, January, 2008
	João M. S. Silva , Joel R. Phillips , L. Miguel Silveira, Efficient representation and analysis of power grids, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
	Praveen Ghanta , Sarma Vrudhula, Analysis of Power Supply Noise in the Presence of Process Variations, IEEE Design & Test, v.24 n.3, p.256-266, May 2007
	Andrew B. Kahng , Bao Liu , Qinke Wang, Stochastic power/ground supply voltage prediction and optimization via analytical placement, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.15 n.8, p.904-912, August 2007
	P. Marques Morgado , Paulo F. Flores , L. Miguel Silveira, Generating realistic stimuli for accurate power grid analysis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.3, p.1-26, May 2009