| Parameterized system design |
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International Conference on Hardware Software Codesign
archive
Proceedings of the eighth international workshop on Hardware/software codesign
table of contents
San Diego, California, United States
Pages: 98 - 102
Year of Publication: 2000
ISBN:1-58113-268-9
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Authors
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Tony D. Givargis
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Department of Computer Science and Engineering, University of California, Riverside, CA
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Frank Vahid
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Department of Computer Science and Engineering, University of California, Riverside, CA
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| Bibliometrics |
Downloads (6 Weeks): 3, Downloads (12 Months): 20, Citation Count: 6
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ABSTRACT
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To be used across a variety of applications, such architectures must be heavily parameterized, so they can adapt to those applications' differing constraints by trading off power, performance and size. We describe several parameterized system design issues, and provide results showing how a single architecture with easily configurable parameters can support a wide range of tradeoffs.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1145/305138.305188]
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Pieter van der Wolf , Paul Lieverse , Mudit Goel , David La Hei , Kees Vissers, An MPEG-2 decoder case study as a driver for a system level design methodology, Proceedings of the seventh international workshop on Hardware/software codesign, p.33-37, March 1999, Rome, Italy
[doi> 10.1145/301177.301196]
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